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[Chiptunes-pms150c.git] / bsv.c
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1#include <stdio.h>
2#include "fakeasm.h"
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3typedef unsigned char u8;
4
268e276e 5u8 i0, i1, i2; //MEM
7e02078f 6u8 n; //MEM
5ebb16dc 7u8 sample; //MEM
d17a26fd 8u8 tmp_1; //MEM
268e276e 9u8 acc; //ACC
f3768c26 10
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11u8 notes[] = {
12 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
13 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
14};
c320426f 15
88d59159 16u8 mod3hi, mod3lo; //MEM
6494a942 17//todo: can mod3hi be aliased to tmp_1?
837c7d6c 18void mod3(void) {
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19 MOV (acc,mod3hi)
20 ADD (mod3lo,acc) // mod3lo = hi+lo
21 CLEAR (acc)
22 ADDC0 (acc) // mod3hi, 1bit
23 SWAP (acc)
24 MOV (mod3hi, acc)
837c7d6c 25
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26 MOV (acc, mod3lo)
27 SWAP (acc)
28 AND (acc, 0xf) // (mod3lo>>4)
29 XCH (mod3lo) // acc=mod3lo, mod3lo=mod3lo>>4
30 AND (acc, 0xF) // acc=mod3lo&0xf, mod3lo=mod3lo>>4
31 ADD (acc, mod3lo) // (mod3lo & 0xF)
32 ADD (acc, mod3hi)
33 MOV (mod3lo, acc)
bf20ae1c 34
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35 AND (acc, 0x3) // acc = (mod3lo & 0x3)
36 SR (mod3lo)
37 SR (mod3lo) // (mod3lo >> 2)
38 ADD (acc, mod3lo)
39 MOV (mod3lo, acc)
5f0928cc 40
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41 AND (acc, 0x3) // acc = (mod3lo & 0x3)
42 SR (mod3lo)
43 SR (mod3lo) // (mod3lo >> 2)
44 ADD (acc, mod3lo)
5f0928cc 45
e465ced0 46 if (acc > 2) { // TODO: acc in [0,1,2,3,4]
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47 SUB (acc,3)
48 }
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49}
50
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51void g(void){
52 u8 notes_ix = acc & 0x7;
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53 if(3&i2)
54 notes_ix += 8;
fb819dd9 55 u8 result = ((i1<<8|i0)*notes[notes_ix])>>8; // keep hi byte
268e276e 56 acc = result;
c395d5c8 57}
f3768c26 58void main(void){
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59 CLEAR (i0)
60 CLEAR (i1)
61 CLEAR (i2)
f3768c26 62 for(;;) {
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63 MOV (acc, i2)// "mov mem,mem"
64 MOV (n, acc)// does not exist
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65 SL (n)
66 SL (n)
67 MOV (acc, i1)
68 SWAP (acc)
69 AND (acc, 0xf)
70 SR (acc)
71 SR (acc)
72 OR (n, acc)
bd4f3b3e 73
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74 MOV (acc, n)
75 CALL (g)
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76 SWAP (acc)
77 AND (acc, 0x1)
78 MOV (sample, acc)
bd4f3b3e 79
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80 MOV (acc, i2)
81 SL (acc)
82 SL (acc)
83 SL (acc)
f5823e3f 84 MOV (tmp_1, acc) // fresh tmp_1:
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85 MOV (acc, i1)
86 SWAP (acc)
87 AND (acc, 0xf)
88 SR (acc)
89 OR (acc, tmp_1) // tmp_1 done.
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90 XOR (acc, n)
91 CALL (g)
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92 SR (acc)
93 AND (acc, i2)
94 SR (acc)
95 AND (acc, 3)
96 ADD (sample, acc)
bd4f3b3e 97
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98 MOV (acc, i2)
99 MOV (mod3hi, acc)
100 SR (mod3hi)
101 SR (mod3hi)
102 SR (mod3hi)
103 SWAP (acc)
104 AND (acc, 0xf0)
105 SL (acc)
106 MOV (mod3lo, acc)
107 MOV (acc, i1)
108 SR (acc)
109 SR (acc)
110 SR (acc)
111 OR (mod3lo, acc)
abd85947 112 CALL (mod3)
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113 ADD (acc, n)
114 CALL (g)
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115 SR (acc)
116 SR (acc)
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117 MOV (tmp_1, acc) // acc saved in tmp_1; fresh acc
118 MOV (acc, i2)
119 // shift-divide by six
2ae98f0b 120 // note: i2 is max 0x78; so acc will <= 20. (breaks vor values >=128)
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121 SR (acc)
122 ADD (acc, i2)
7e0dee10 123 SR (acc)
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124 SR (acc)
125 ADD (acc, i2)
7e0dee10 126 SR (acc)
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127 SR (acc)
128 ADD (acc, i2)
7e0dee10 129 SR (acc)
7e0dee10 130 SR (acc)
7e0dee10 131 SR (acc)
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132 // end divide by six
133 AND (acc, tmp_1) // acc restored from tmp_1
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134 AND (acc, 3)
135 ADD (sample, acc)
bd4f3b3e 136
89250744 137 mod3hi = i2>>2;
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138 MOV (acc, i2)
139 SWAP (acc)
140 AND (acc, 0xf0)
141 SL (acc)
142 SL (acc)
143 MOV (mod3lo, acc)
144 MOV (acc, i1)
145 SR (acc)
146 SR (acc)
147 OR (mod3lo, acc)
148
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149 CALL (mod3)
150 SUB (acc, n)
151 SUB (acc, 8)
152 NEG (acc)
b2ed0598 153 CALL (g)
5ebb16dc 154 SR (acc)
c004ed39 155 MOV (tmp_1, acc) // acc saved in tmp_1; fresh acc
7cbbb5ba 156 MOV (acc, i2)
c004ed39 157 // shift-divide by ten
b29570af 158 // note: i2 is max 0x78; so acc will <= 12.
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159 INC (i2)
160 SR (acc)
161 ADD (acc, i2)
162 SR (acc)
163 SR (acc)
164 SR (acc)
165 ADD (acc, i2)
166 SR (acc)
167 ADD (acc, i2)
28556352 168 SWAP (acc)
1d9b2eb7 169 DEC (i2)
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170 // end divide by ten
171 AND (acc, tmp_1) // acc restored from tmp_1
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172 AND (acc, 3)
173 ADD (sample, acc)
bd4f3b3e 174
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175 MOV (acc, sample)
176 SWAP (acc)
177 putchar(acc);
ac66812d 178
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179 INC (i0)
180 i1 += !i0; // ADDC i1
181 i2 += !i1 && !i0; // ADDC i2
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182
183 if(i2 == 0x78) break;
fef0e35b 184 }
c395d5c8 185}
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