transscribe fakeasm to realasm
[Chiptunes-pms150c.git] / bsv.S
CommitLineData
ec2152ea
TG
1;.area DATA
2.area OSEG (OVR,DATA)
3;.area DATA
4notes: .ds 16 ; 0x00 .. 0x0f
5i0: .ds 1 ; 0x10
6i1: .ds 1 ; 0x11
7i2: .ds 1 ; 0x12
8n: .ds 1 ; 0x13
9.even ; make next two bytes word-aligned
10zero: .ds 1 ; 0x14
11tmp_1: .ds 1 ; 0x15
12tmp_hi: .ds 1 ; 0x16
13tmp_lo: .ds 1 ; 0x17
14pwm: .ds 1 ; 0x18
15.area SSEG
16stack: .ds 1
17
18; aliases for memory locations:
19notes_ix = tmp_1
20t = tmp_1
21mul2 = tmp_hi
22mul1 = tmp_lo
23mod3hi = tmp_hi
24mod3lo = tmp_lo
25
26
27
28.area CSEG (CODE,ABS)
29;.area HOME
30;.area HEADER (ABS)
31.org 0x0000
32 ;TODO: move some init stuff here (space for 15 instr.)
33 GOTO init
34
35;.area HOME
36;.area HEADER (ABS)
37.org 0x0020
38 GOTO sample
39
40;.area CODE
41
42mod3:
43 MOV a, mod3hi
44 ADD mod3lo, a ; mod3lo = hi+lo
45 MOV a, #0
46 ADDC a ; mod3hi, 1bit
47 SWAP a
48 MOV mod3hi, a
49
50 MOV a, mod3lo
51 SWAP a
52 AND a, #0xf ; (mod3lo>>4)
53 XCH mod3lo ; a=mod3lo, mod3lo=mod3lo>>4
54 AND a, #0xF ; a=mod3lo&0xf, mod3lo=mod3lo>>4
55 ADD a, mod3lo ; (mod3lo & 0xF)
56 ADD a, mod3hi
57 MOV mod3lo, a
58
59 AND a, #0x3 ; a = (mod3lo & 0x3)
60 SR mod3lo
61 SR mod3lo ; (mod3lo >> 2)
62 ADD a, mod3lo
63 MOV mod3lo, a
64
65 AND a, #0x3 ; a = (mod3lo & 0x3)
66 SR mod3lo
67 SR mod3lo ; (mod3lo >> 2)
68 ADD a, mod3lo
69
70 SUB a, #3
71 T0SN f, c
72 ADD a, #3
73 RET
74
75g:
76 ; notes_ix_hi = always 0
77 AND a, #0x7
78 MOV notes_ix, a
79 ; test i2 & 3:
80 MOV a, i2
81 AND a, #3
82 T0SN f, z
83 SET1 notes_ix, #3
84 IDXM a, notes_ix
85
86 MOV t, a
87 CLEAR mul2
88 CLEAR mul1
89 ; note: LSB of result (mul0) is not needed for our purposes
90 ;;1/8:
91 SR t
92 T1SN f, c
93 GOTO skip1
94 MOV a, i0
95 ADD mul1, a
96 MOV a, i1
97 ADDC mul2, a
98 skip1: SR mul2
99 SRC mul1
100 ;;2/8:
101 SR t
102 skip2: SR mul2
103 SRC mul1
104 ;;3/8:
105 SR t
106 T1SN f, c
107 GOTO skip3
108 MOV a, i0
109 ADD mul1, a
110 MOV a, i1
111 ADDC mul2, a
112 skip3: SR mul2
113 SRC mul1
114 ;;4/8:
115 SR t
116 T1SN f, c
117 GOTO skip4
118 MOV a, i0
119 ADD mul1, a
120 MOV a, i1
121 ADDC mul2, a
122 skip4: SR mul2
123 SRC mul1
124 ;;5/8:
125 SR t
126 T1SN f, c
127 GOTO skip5
128 MOV a, i0
129 ADD mul1, a
130 MOV a, i1
131 ADDC mul2, a
132 skip5: SR mul2
133 SRC mul1
134 ;;6/8:
135 SR t
136 T1SN f, c
137 GOTO skip6
138 MOV a, i0
139 ADD mul1, a
140 skip6:
141 SRC mul1
142 ;;7/8:
143 SR t
144 T1SN f, c
145 GOTO skip7
146 MOV a, i0
147 ADD mul1, a
148 skip7:
149 SRC mul1
150 ;;8/8:
151 SR t
152 T1SN f, c
153 GOTO skip8
154 MOV a, i0
155 ADD mul1, a
156 skip8:
157 SRC mul1
158
159 MOV a, mul1
160 RET
161
162init:
163 CLEAR i0
164 CLEAR i1
165 CLEAR i2
166
167 ;rom is not mmapped; must load into ram first
168 MOV a, #0x84
169 MOV notes+0x0, a
170 MOV notes+0x5, a
171 MOV a, #0x9d
172 MOV notes+0x1, a
173 MOV notes+0x4, a
174 MOV a, #0xb0
175 MOV notes+0x2, a
176 MOV notes+0xA, a
177 MOV a, #0x69
178 MOV notes+0x3, a
179 MOV notes+0x6, a
180 MOV notes+0xB, a
181 MOV notes+0xE, a
182 MOV a, #0x58
183 MOV notes+0x7, a
184 MOV notes+0xF, a
185 MOV a, #0x75
186 MOV notes+0x8, a
187 MOV notes+0xD, a
188 MOV a, #0x8c
189 MOV notes+0x9, a
190 MOV notes+0xC, a
191
192 ;TODO: setup mcu, timer16, ...
193 ;TODO: freepdk calibration routine
194
195loop:
196 ;TODO: test i2==0x78 to enter halt()
197 ;TODO: stopsys
198 GOTO loop
199
200sample:
201 ;TODO: send pwm data to timer2
202
203 MOV a, i2; "mov mem,mem"
204 MOV n, a; does not exist
205 SL n
206 SL n
207 MOV a, i1
208 SWAP a
209 AND a, #0xf
210 SR a
211 SR a
212 OR n, a
213
214 MOV a, n
215 CALL g
216 SWAP a
217 AND a, #0x1
218 MOV pwm, a
219
220 MOV a, i2
221 SL a
222 SL a
223 SL a
224 MOV tmp_1, a ; fresh tmp_1:
225 MOV a, i1
226 SWAP a
227 AND a, #0xf
228 SR a
229 OR a, tmp_1 ; tmp_1 done.
230 XOR a, n
231 CALL g
232 SR a
233 AND a, i2
234 SR a
235 AND a, #3
236 ADD pwm, a
237
238 MOV a, i2
239 MOV mod3hi, a
240 SR mod3hi
241 SR mod3hi
242 SR mod3hi
243 SWAP a
244 AND a, #0xf0
245 SL a
246 MOV mod3lo, a
247 MOV a, i1
248 SR a
249 SR a
250 SR a
251 OR mod3lo, a
252 CALL mod3
253 ADD a, n
254 CALL g
255 SR a
256 SR a
257 MOV tmp_1, a ; a saved in tmp_1; fresh a
258 MOV a, i2
259 ; shift-divide by six
260 ; note: i2 is max 0x78; so a will <= 20. (breaks vor values >=128)
261 SR a
262 ADD a, i2
263 SR a
264 SR a
265 ADD a, i2
266 SR a
267 SR a
268 ADD a, i2
269 SR a
270 SR a
271 SR a
272 ; end divide by six
273 AND a, tmp_1 ; a restored from tmp_1
274 AND a, #3
275 ADD pwm, a
276
277 MOV a, i2
278 MOV mod3hi, a
279 SR mod3hi
280 SR mod3hi
281 SWAP a
282 AND a, #0xf0
283 SL a
284 SL a
285 MOV mod3lo, a
286 MOV a, i1
287 SR a
288 SR a
289 OR mod3lo, a
290 CALL mod3
291 SUB a, n
292 SUB a, #8
293 NEG a
294 CALL g
295 SR a
296 MOV tmp_1, a ; a saved in tmp_1; fresh a
297 MOV a, i2
298 ; shift-divide by ten
299 ; note: i2 is max 0x78; so a will <= 12.
300 INC i2
301 SR a
302 ADD a, i2
303 SR a
304 SR a
305 SR a
306 ADD a, i2
307 SR a
308 ADD a, i2
309 SWAP a
310 DEC i2
311 ; end divide by ten
312 AND a, tmp_1 ; a restored from tmp_1
313 AND a, #3
314 ADD pwm, a
315
316 MOV a, pwm
317 SWAP a
318 ; next sample is now ready.
319
320 INC i0
321 ADDC i1
322 ADDC i2
323
324 RETI
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