]> git.gir.st - Chiptunes-pms150c.git/blob - bsv.c
d584e38eee165aa39e88f64ef9b4ade2094be26d
[Chiptunes-pms150c.git] / bsv.c
1 #include <stdio.h>
2 #include "fakeasm.h"
3 typedef unsigned char u8;
4
5 u8 i0, i1, i2; //MEM
6 u8 n; //MEM
7 u8 sample; //MEM
8 u8 tmp_1; //MEM
9 u8 acc; //ACC
10
11 u8 notes[] = {
12 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
13 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
14 };
15
16 void g(void){
17 u8 notes_ix = acc & 0x7;
18 if(3&i2)
19 notes_ix += 8;
20 u8 result = ((i1<<8|i0)*notes[notes_ix])>>8; // keep hi byte
21 acc = result;
22 }
23 void main(void){
24 CLEAR (i0)
25 CLEAR (i1)
26 CLEAR (i2)
27 for(;;) {
28 MOV (acc, i2)// "mov mem,mem"
29 MOV (n, acc)// does not exist
30 SL (n)
31 SL (n)
32 MOV (acc, i1)
33 SWAP (acc)
34 AND (acc, 0xf)
35 SR (acc)
36 SR (acc)
37 OR (n, acc)
38
39 MOV (acc, n)
40 CALL (g)
41 SWAP (acc)
42 AND (acc, 0x1)
43 MOV (sample, acc)
44
45 MOV (acc, i2)
46 SL (acc)
47 SL (acc)
48 SL (acc)
49 MOV (tmp_1, acc) // fresh tmp_1:
50 MOV (acc, i1)
51 SWAP (acc)
52 AND (acc, 0xf)
53 SR (acc)
54 OR (acc, tmp_1) // tmp_1 done.
55 XOR (acc, n)
56 CALL (g)
57 SR (acc)
58 AND (acc, i2)
59 SR (acc)
60 AND (acc, 3)
61 ADD (sample, acc)
62
63 { u8 tmp2 = (i2<<5|i1>>3)%3;//TODO
64 MOV (acc, tmp2)
65 ADD (acc, n)
66 CALL (g)
67 } //tmp2
68 SR (acc)
69 SR (acc)
70 MOV (tmp_1, acc) // acc saved in tmp_1; fresh acc
71 MOV (acc, i2)
72 // shift-divide by six
73 // note: i2 is max 0x78; so acc will <= 20. (breaks vor values >=128)
74 SR (acc)
75 ADD (acc, i2)
76 SR (acc)
77 SR (acc)
78 ADD (acc, i2)
79 SR (acc)
80 SR (acc)
81 ADD (acc, i2)
82 SR (acc)
83 SR (acc)
84 SR (acc)
85 // end divide by six
86 AND (acc, tmp_1) // acc restored from tmp_1
87 AND (acc, 3)
88 ADD (sample, acc)
89
90 MOV (acc, n)
91 ADD (acc, 8)
92 { u8 tmp3 = (i2<<6|i1>>2)%3;
93 SUB (acc, tmp3)
94 } // tmp3
95 CALL (g)
96 SR (acc)
97 MOV (tmp_1, acc) // acc saved in tmp_1; fresh acc
98 MOV (acc, i2)
99 // shift-divide by ten
100 // note: i2 is max 0x78; so acc will <= 12.
101 INC (i2)
102 SR (acc)
103 ADD (acc, i2)
104 SR (acc)
105 SR (acc)
106 SR (acc)
107 ADD (acc, i2)
108 SR (acc)
109 ADD (acc, i2)
110 SR (acc)
111 SR (acc)
112 SR (acc)
113 SR (acc)
114 DEC (i2)
115 // end divide by ten
116 AND (acc, tmp_1) // acc restored from tmp_1
117 AND (acc, 3)
118 ADD (sample, acc)
119
120 MOV (acc, sample)
121 SWAP (acc)
122 putchar(acc);
123
124 INC (i0)
125 i1 += !i0; // ADDC i1
126 i2 += !i1 && !i0; // ADDC i2
127 }
128 }
Imprint / Impressum