From: Tobias Girstmair Date: Tue, 27 Apr 2021 14:37:49 +0000 (+0200) Subject: fix IDXR invocation and minor bugs X-Git-Url: https://git.gir.st/Chiptunes-pms150c.git/commitdiff_plain/bdcf57fd39744c87bbce657c86480476ce89cbb1 fix IDXR invocation and minor bugs - IDXR was called with the wrong endianness, and the hi-byte of notes_ix is now properly cleared. also, we use one less SRAM location. - in the big multiplication in g(), we accidentally used SRC instead of SR in some places. by pure chance the bug wasn't triggered. - some space is now left after the interrupt vector, so new code can be appended to the end, and the GOTO programmed 'over' with a NOP. - fix some typos in comments. this gets the music mostly working; there are some wrong notes, but it is recongizable. --- diff --git a/bsv.asm b/bsv.asm index 8a73ba5..1a60072 100644 --- a/bsv.asm +++ b/bsv.asm @@ -9,12 +9,11 @@ i0: .ds 1 ; 0x10 i1: .ds 1 ; 0x11 i2: .ds 1 ; 0x12 n: .ds 1 ; 0x13 -.even ; make next two bytes word-aligned -zero: .ds 1 ; 0x14 +pwm: .ds 1 ; 0x14 tmp_1: .ds 1 ; 0x15 -tmp_hi: .ds 1 ; 0x16 -tmp_lo: .ds 1 ; 0x17 -pwm: .ds 1 ; 0x18 +.even ; make next two bytes word-aligned +tmp_lo: .ds 1 ; 0x16 +tmp_hi: .ds 1 ; 0x17 .even ; SP must be aligned stack_start: .ds 1 @@ -22,7 +21,7 @@ stack_start: .ds 1 stack: .ds 1 ; aliases for memory locations: -notes_ix = tmp_1 +notes_ix = tmp_lo t = tmp_1 mul2 = tmp_hi mul1 = tmp_lo @@ -59,7 +58,7 @@ calib_vdd = 3000 ; mV active_clock = (( 0<<5 | 1<<4 | 0<<3 | 1<<2 | 0<<1 | 0<<0 )) ; during deep-sleep: ILRC/1, WDT off sleep_clock = (( 7<<5 | 1<<4 | 0<<3 | 1<<2 | 0<<1 | 0<<0 )) -; for extra power saving, consider: 6<<5|0<<3 for ilrc/6, 2<<5|1<<3 for ilrc/16 +; for extra power saving, consider: 6<<5|0<<3 for ilrc/4, 2<<5|1<<3 for ilrc/16 ; cycle count (worst-case) ; mod3: 28 @@ -79,6 +78,7 @@ sleep_clock = (( 7<<5 | 1<<4 | 0<<3 | 1<<2 | 0<<1 | 0<<0 )) .org 0x0020 GOTO interrupt +.org 0x0040 ; leave some space after IVT to allow 'overprogramming' mod3: MOV a, mod3hi ADD mod3lo, a ; mod3lo = hi+lo @@ -113,7 +113,7 @@ mod3: RET g: - ; notes_ix_hi = always 0 + CLEAR mul2 ; this is notes_ix_hi (and should be 0) AND a, #0x7 MOV notes_ix, a ; test i2 & 3: @@ -124,8 +124,7 @@ g: IDXM a, notes_ix MOV t, a - CLEAR mul2 - CLEAR mul1 + CLEAR mul1 ; alias of notes_ix, so clear after idxm ; note: LSB of result (mul0) is not needed for our purposes ;;1/8: SR t @@ -178,7 +177,7 @@ g: MOV a, i0 ADD mul1, a skip6: - SRC mul1 + SR mul1 ;;7/8: SR t T1SN f, c @@ -186,7 +185,7 @@ g: MOV a, i0 ADD mul1, a skip7: - SRC mul1 + SR mul1 ;;8/8: SR t T1SN f, c @@ -194,7 +193,7 @@ g: MOV a, i0 ADD mul1, a skip8: - SRC mul1 + SR mul1 MOV a, mul1 RET @@ -205,19 +204,19 @@ init: MOV a, #active_clock MOV clkmd, a ; switch to IHRC - ;; .org 0xe8 ; comment out on 2nd iteration - ;; ; calibration placeholder: - ;; AND a, #'R' - ;; AND a, #'C' - ;; AND a, #1 ; IHRC - ;; AND a, #( calib_freq ) - ;; AND a, #( calib_freq>>8 ) - ;; AND a, #( calib_freq>>16 ) - ;; AND a, #( calib_freq>>24 ) - ;; AND a, #( calib_vdd ) - ;; AND a, #( calib_vdd>>8 ) - ;; AND a, #ihrcr - .org 0xfc + .org 0x106 ; comment out on 2nd iteration + ; calibration placeholder: + AND a, #'R' + AND a, #'C' + AND a, #1 ; IHRC + AND a, #( calib_freq ) + AND a, #( calib_freq>>8 ) + AND a, #( calib_freq>>16 ) + AND a, #( calib_freq>>24 ) + AND a, #( calib_vdd ) + AND a, #( calib_vdd>>8 ) + AND a, #ihrcr + .org 0x11a ;stack setup: MOV a, #stack_start @@ -246,6 +245,7 @@ init: ;timer16/ivr setup MOV a, #(( 0<<0 | 1<<3 | 4<<5 )) ; ovf@bit8 (512cy; §9.2.5), clk/4, ihrc + ;^xxx: could use 0b000000 syntax for compact binary values MOV t16m, a MOV a, #(1<<2) ; enable timer16 int, disable all others MOV inten, a @@ -348,7 +348,6 @@ interrupt: ; send pwm data to timer2: MOV a, pwm - ADD a, #4 MOV tm2b, a ; generate new sample: @@ -409,7 +408,7 @@ interrupt: MOV tmp_1, a ; a saved in tmp_1; fresh a MOV a, i2 ; shift-divide by six - ; note: i2 is max 0x78; so a will <= 20. (breaks vor values >=128) + ; note: i2 is max 0x78; so a will <= 20. (breaks for values >=128) SR a ADD a, i2 SR a