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[Chiptunes.git] / foo.c
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61fab018 1#include <stdio.h>
da32ed67 2#include "fakeasm.h"
61fab018 3typedef unsigned char u8;
da32ed67 4
24abdcbb
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5u8 data[] = {
6 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
7 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
8};
95fa231f 9u8 zero; //zero register
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10u8 i0;
11u8 i1;
12u8 i2;
13u8 i3;
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14u8 x;
15u8 t;
16u8 o;
49137fbf 17u8 _;
e98ab46f 18#define Mh o //mod3 vars
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19#define Ml t // -"-
20void mod3(void) { //avail: t, o _
e98ab46f 21//http://homepage.divms.uiowa.edu/~jones/bcd/mod.shtml
5b1c6cc5 22 #define tmp _
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23 ADD (Ml, Mh)
24 CLR (Mh)
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25 ADC (Mh, zero, carry) //Mh only holds the carry bit
26 MOV (tmp, Ml)
27 SWAP (tmp)
28 ANDI (tmp, 0x0f)
29 SWAP (Mh)
30 OR (tmp, Mh)
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31 ANDI (Ml, 0x0f)
32 ADD (Ml, tmp) //discard tmp
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33 MOV (tmp, Ml)
34 LSR (tmp)
35 LSR (tmp)
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36 ANDI (Ml, 0x03)
37 Ml = (tmp) + (Ml);
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38 Ml = (Ml >> 2) + (Ml & 0x3);
39 if (Ml > 2) Ml = Ml - 3;
5b1c6cc5 40 #undef tmp
e98ab46f 41}
965274e2 42void g(void) {
46a8d83c 43 // g(i, x, t, o) -> t
49137fbf 44 #define tmp _
0f219114 45 ANDI (t, 0x07)
32632e61 46 MOV (tmp, i2)
63363195 47 ANDI (tmp, 3)
09cf3949 48 TST (tmp)
49137fbf 49 #undef tmp
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50 BREQ (skip)
51 SUBI (t, -8)
52 skip:
c616f0c2 53 t = data[t];
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54 /*MOV X_hi==_, data_hi
55 MOV X_lo==t, data_lo
56 ADD X_lo, t
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57 ADC X_hi, zero
58 LD t, X */
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59 t = (((i1&0x1f)<<8|i0)*t)>>8; //TODO
60 t >>= o; //NOTE: o == {1, 2, 4}
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61 AND (t, x)
62 ANDI (t, 3)
46a8d83c 63 RET
61fab018
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64};
65
66int main(void) {
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67 u8 n;
68 u8 s;
ab6fe4c2 69 u8 acc;
89f35588 70 //TODO: clear all vars/registers
5dd8b8ff 71 for (;;) {
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72 MOV (n, i2)
73 LSL (n)
74 LSL (n)
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75 #define tmp acc
76 MOV (tmp, i1)
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77 SWAP (tmp)
78 ANDI (tmp, 0x0f)
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79 LSR (tmp)
80 LSR (tmp)
128ff01a 81 OR (n, tmp)
bc7680e3 82 #undef tmp
df192822 83 MOV (s, i3)
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84 ROR (s)
85 ROR (s)
86 ANDI (s, 0x80)
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87 #define tmp acc
88 MOV (tmp, i2)
89 LSR (tmp)
e389879f 90 OR (s, tmp)
df192822 91 #undef tmp
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92
93 //voice 1:
94 LDI (x, 1)
95 MOV (t, n)
9401049b 96 LDI (o, 4)
965274e2 97 RCALL g();
46a8d83c 98 MOV (acc, t)
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99
100 //voice 2:
101 MOV (x, s)
1b023e92 102 #define tmp o
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103 MOV (tmp, i2)
104 LSL (tmp)
105 LSL (tmp)
106 LSL (tmp)
107 MOV (t, i1)
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108 SWAP (t)
109 ANDI (t, 0xf)
110 LSR (t)
94c4920f 111 OR (t, tmp)
1b023e92 112 #undef tmp
23872091 113 EOR (t, n)
9401049b 114 LDI (o, 2)
965274e2 115 RCALL g();
46a8d83c 116 ADD (acc, t)
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117
118 //voice 3:
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119 MOV (x, s)
120 INC (x)
17c5b4e9 121 #define tmp o
a7a7abba 122 MOV (tmp, x)
f84bcb7f 123 LSR (tmp)
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124 LSR (tmp)
125 ADD (tmp, x)
126 ROR (tmp)
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127 LSR (tmp)
128 ADD (tmp, x)
129 ROR (tmp)
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130 LSR (tmp)
131 ADD (tmp, x)
132 ROR (tmp)
546b5bab 133 LSR (tmp)
2c94c801 134 MOV (x, tmp)
17c5b4e9 135 #undef tmp
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136 Ml = i2<<5 | i1>>3;
137 Mh = i3<<5 | i2>>3;
dbf91c38 138 RCALL mod3();
18570947 139 ADD (t, n)
9401049b 140 LDI (o, 2)
965274e2 141 RCALL g();
46a8d83c 142 ADD (acc, t)
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143
144 //voice 4:
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145 MOV (x, s)
146 INC (x)
147 #define tmp o
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148 MOV (tmp, x)
149 LSR (tmp)
150 ADD (tmp, x)
151 ROR (tmp)
86f35aa4 152 LSR (tmp)
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153 LSR (tmp)
154 ADD (tmp, x)
155 ROR (tmp)
156 ADD (tmp, x)
157 ROR (tmp)
86f35aa4 158 LSR (tmp)
86f35aa4 159 LSR (tmp)
c2693411 160 MOV (x, tmp)
6bc3ca83 161 #undef tmp
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162 Ml = i2<<6 | i1>>2;
163 Mh = i3<<6 | i2>>2;
dbf91c38 164 RCALL mod3();
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165 SUB (t, n)
166 NEG (t)
902cfdea 167 SUBI (t, -8)
9401049b 168 LDI (o, 1)
965274e2 169 RCALL g();
46a8d83c 170 ADD (acc, t)
bfce2f8c 171
95fa231f 172 putchar(acc<<4); //TODO
89f35588 173 SUBI (i0, -1)
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174 ADC (i1, zero, !i0)
175 ADC (i2, zero, !i0&&!i1)
176 ADC (i3, zero, !i0&&!i1&&!i2)
fe9a76e4 177 }
61fab018 178}
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