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[Chiptunes.git] / foo.c
CommitLineData
61fab018 1#include <stdio.h>
da32ed67 2#include "fakeasm.h"
61fab018 3typedef unsigned char u8;
da32ed67 4
24abdcbb
TG
5u8 data[] = {
6 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
7 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
8};
06aad1ff
TG
9u8 i0;
10u8 i1;
11u8 i2;
12u8 i3;
3b86ca43
TG
13u8 x;
14u8 t;
15u8 o;
965274e2 16void g(void) {
46a8d83c 17 // g(i, x, t, o) -> t
63363195 18 u8 tmp;
0f219114 19 ANDI (t, 0x07)
32632e61 20 MOV (tmp, i2)
63363195 21 ANDI (tmp, 3)
09cf3949
TG
22 TST (tmp)
23 BREQ (skip)
24 SUBI (t, -8)
25 skip:
c616f0c2 26 t = data[t];
7afa39fa 27 t = (((i1&0x1f)<<8|i0)*t) >> o;
c616f0c2
TG
28 AND (t, x)
29 ANDI (t, 3)
46a8d83c 30 RET
61fab018
TG
31};
32
33int main(void) {
a1631438
TG
34 u8 n;
35 u8 s;
ab6fe4c2 36 u8 acc;
89f35588 37 //TODO: clear all vars/registers
5dd8b8ff 38 for (;;) {
7874ed03
TG
39 MOV (n, i2)
40 LSL (n)
41 LSL (n)
bc7680e3
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42 #define tmp acc
43 MOV (tmp, i1)
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44 SWAP (tmp)
45 ANDI (tmp, 0x0f)
3eef1ade
TG
46 LSR (tmp)
47 LSR (tmp)
128ff01a 48 OR (n, tmp)
bc7680e3 49 #undef tmp
df192822 50 MOV (s, i3)
27b03017
TG
51 ROR (s)
52 ROR (s)
53 ANDI (s, 0x80)
a582bbc3
TG
54 #define tmp acc
55 MOV (tmp, i2)
56 LSR (tmp)
e389879f 57 OR (s, tmp)
df192822 58 #undef tmp
3b86ca43
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59
60 //voice 1:
61 LDI (x, 1)
62 MOV (t, n)
63 LDI (o, 12)
965274e2 64 RCALL g();
46a8d83c 65 MOV (acc, t)
3b86ca43
TG
66
67 //voice 2:
68 MOV (x, s)
1b023e92 69 #define tmp o
94c4920f
TG
70 MOV (tmp, i2)
71 LSL (tmp)
72 LSL (tmp)
73 LSL (tmp)
74 MOV (t, i1)
4b0b7dc5
TG
75 SWAP (t)
76 ANDI (t, 0xf)
77 LSR (t)
94c4920f 78 OR (t, tmp)
1b023e92 79 #undef tmp
23872091 80 EOR (t, n)
3b86ca43 81 LDI (o, 10)
965274e2 82 RCALL g();
46a8d83c 83 ADD (acc, t)
3b86ca43
TG
84
85 //voice 3:
2666c079
TG
86 MOV (x, s)
87 INC (x)
17c5b4e9 88 #define tmp o
2666c079 89 x = (x*0x55)>>8;
17c5b4e9 90 #undef tmp
18570947
TG
91 t = ((i3&0x01)<<13 | i2<<5 | i1>>3) % 3;
92 ADD (t, n)
3b86ca43 93 LDI (o, 10)
965274e2 94 RCALL g();
46a8d83c 95 ADD (acc, t)
3b86ca43
TG
96
97 //voice 4:
6bc3ca83
TG
98 MOV (x, s)
99 INC (x)
100 #define tmp o
101 x = (x*0x33)>>8;
102 #undef tmp
e4f7baf0
TG
103 t = ((i3&0x01)<<14 | i2<<6 | i1>>2) % 3;
104 SUB (t, n)
105 NEG (t)
902cfdea 106 SUBI (t, -8)
3b86ca43 107 LDI (o, 9)
965274e2 108 RCALL g();
46a8d83c 109 ADD (acc, t)
bfce2f8c 110
ab6fe4c2 111 putchar(acc<<4);
89f35588
TG
112 #define tmp acc
113 LDI (tmp, 0)
114 SUBI (i0, -1)
115 ADC (i1, tmp, !i0)
116 ADC (i2, tmp, !i0&&!i1)
117 ADC (i3, tmp, !i0&&!i1&&!i2)
dd7bbc4a 118 #undef tmp
fe9a76e4 119 }
61fab018 120}
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