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[Chiptunes.git] / foo.c
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61fab018 1#include <stdio.h>
da32ed67 2#include "fakeasm.h"
61fab018 3typedef unsigned char u8;
da32ed67 4
24abdcbb
TG
5u8 data[] = {
6 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
7 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
8};
95fa231f 9u8 zero; //zero register
06aad1ff
TG
10u8 i0;
11u8 i1;
12u8 i2;
13u8 i3;
3b86ca43
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14u8 x;
15u8 t;
16u8 o;
49137fbf 17u8 _;
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18#define Mh o //mod3 vars
19#define Ml _ // -"-
20#define Mr t // -"-
21u8 mod3(u8 hi, u8 lo) { //avail: t, o _
22//http://homepage.divms.uiowa.edu/~jones/bcd/mod.shtml
23 unsigned short a = ((hi) + (lo)) &0x1ff;
24 hi = a>>8; //1 bit
25 lo = a;
26 lo = (hi<<4|lo>>4) + (lo & 0xF);
27 lo = (lo >> 2) + (lo & 0x3);
28 lo = (lo >> 2) + (lo & 0x3);
29 if (lo > 2) lo = lo - 3;
30 return lo;
31}
965274e2 32void g(void) {
46a8d83c 33 // g(i, x, t, o) -> t
49137fbf 34 #define tmp _
0f219114 35 ANDI (t, 0x07)
32632e61 36 MOV (tmp, i2)
63363195 37 ANDI (tmp, 3)
09cf3949 38 TST (tmp)
49137fbf 39 #undef tmp
09cf3949
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40 BREQ (skip)
41 SUBI (t, -8)
42 skip:
c616f0c2 43 t = data[t];
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44 /*MOV X_hi==_, data_hi
45 MOV X_lo==t, data_lo
46 ADD X_lo, t
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47 ADC X_hi, zero
48 LD t, X */
e5715654
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49 t = (((i1&0x1f)<<8|i0)*t)>>8; //TODO
50 t >>= o; //NOTE: o == {1, 2, 4}
c616f0c2
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51 AND (t, x)
52 ANDI (t, 3)
46a8d83c 53 RET
61fab018
TG
54};
55
56int main(void) {
a1631438
TG
57 u8 n;
58 u8 s;
ab6fe4c2 59 u8 acc;
89f35588 60 //TODO: clear all vars/registers
5dd8b8ff 61 for (;;) {
7874ed03
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62 MOV (n, i2)
63 LSL (n)
64 LSL (n)
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65 #define tmp acc
66 MOV (tmp, i1)
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67 SWAP (tmp)
68 ANDI (tmp, 0x0f)
3eef1ade
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69 LSR (tmp)
70 LSR (tmp)
128ff01a 71 OR (n, tmp)
bc7680e3 72 #undef tmp
df192822 73 MOV (s, i3)
27b03017
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74 ROR (s)
75 ROR (s)
76 ANDI (s, 0x80)
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77 #define tmp acc
78 MOV (tmp, i2)
79 LSR (tmp)
e389879f 80 OR (s, tmp)
df192822 81 #undef tmp
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82
83 //voice 1:
84 LDI (x, 1)
85 MOV (t, n)
9401049b 86 LDI (o, 4)
965274e2 87 RCALL g();
46a8d83c 88 MOV (acc, t)
3b86ca43
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89
90 //voice 2:
91 MOV (x, s)
1b023e92 92 #define tmp o
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93 MOV (tmp, i2)
94 LSL (tmp)
95 LSL (tmp)
96 LSL (tmp)
97 MOV (t, i1)
4b0b7dc5
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98 SWAP (t)
99 ANDI (t, 0xf)
100 LSR (t)
94c4920f 101 OR (t, tmp)
1b023e92 102 #undef tmp
23872091 103 EOR (t, n)
9401049b 104 LDI (o, 2)
965274e2 105 RCALL g();
46a8d83c 106 ADD (acc, t)
3b86ca43
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107
108 //voice 3:
2666c079
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109 MOV (x, s)
110 INC (x)
17c5b4e9 111 #define tmp o
a7a7abba 112 MOV (tmp, x)
f84bcb7f 113 LSR (tmp)
546b5bab
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114 LSR (tmp)
115 ADD (tmp, x)
116 ROR (tmp)
546b5bab
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117 LSR (tmp)
118 ADD (tmp, x)
119 ROR (tmp)
546b5bab
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120 LSR (tmp)
121 ADD (tmp, x)
122 ROR (tmp)
546b5bab 123 LSR (tmp)
2c94c801 124 MOV (x, tmp)
17c5b4e9 125 #undef tmp
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126 Ml = i2<<5 | i1>>3;
127 Mh = i3<<5 | i2>>3;
128 t = mod3(Mh,Ml); //TODO
18570947 129 ADD (t, n)
9401049b 130 LDI (o, 2)
965274e2 131 RCALL g();
46a8d83c 132 ADD (acc, t)
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133
134 //voice 4:
6bc3ca83
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135 MOV (x, s)
136 INC (x)
137 #define tmp o
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138 MOV (tmp, x)
139 LSR (tmp)
140 ADD (tmp, x)
141 ROR (tmp)
86f35aa4 142 LSR (tmp)
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143 LSR (tmp)
144 ADD (tmp, x)
145 ROR (tmp)
146 ADD (tmp, x)
147 ROR (tmp)
86f35aa4 148 LSR (tmp)
86f35aa4 149 LSR (tmp)
c2693411 150 MOV (x, tmp)
6bc3ca83 151 #undef tmp
e98ab46f
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152 Ml = i2<<6 | i1>>2;
153 Mh = i3<<6 | i2>>2;
154 t = mod3(Mh,Ml); //TODO
e4f7baf0
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155 SUB (t, n)
156 NEG (t)
902cfdea 157 SUBI (t, -8)
9401049b 158 LDI (o, 1)
965274e2 159 RCALL g();
46a8d83c 160 ADD (acc, t)
bfce2f8c 161
95fa231f 162 putchar(acc<<4); //TODO
89f35588 163 SUBI (i0, -1)
95fa231f
TG
164 ADC (i1, zero, !i0)
165 ADC (i2, zero, !i0&&!i1)
166 ADC (i3, zero, !i0&&!i1&&!i2)
fe9a76e4 167 }
61fab018 168}
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