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1#include <stdio.h>
2#include "fakeasm.h"
3typedef unsigned char u8;
4
5u8 data[] = {
6 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
7 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
8};
9u8 zero; //zero register
10u8 i0;
11u8 i1;
12u8 i2;
13u8 i3;
14u8 n;
15u8 s;
16u8 acc;
17u8 t;
18u8 x;
19u8 _;
20#define Mh x //mod3 vars
21#define Ml t // -"-
22//http://homepage.divms.uiowa.edu/~jones/bcd/mod.shtml
23void mod3(void) {
24 // mod3(Mh.Ml) -> t
25 #define tmp _
26 ADD (Ml, Mh)
27 CLR (Mh)
28 ADC (Mh, zero, carry) //Mh only holds the carry bit
29 MOV (tmp, Ml)
30 SWAP (tmp)
31 ANDI (tmp, 0x0f)
32 SWAP (Mh)
33 OR (tmp, Mh)
34 ANDI (Ml, 0x0f)
35 ADD (Ml, tmp)
36 MOV (tmp, Ml)
37 LSR (tmp)
38 LSR (tmp)
39 ANDI (Ml, 0x03)
40 ADD (Ml, tmp)
41 MOV (tmp, Ml)
42 LSR (tmp)
43 LSR (tmp)
44 ANDI (Ml, 0x03)
45 ADD (Ml, tmp)
46 CPI (Ml, 3)
47 BRPL (skip)
48 SUBI (Ml, 3)
49 skip:;
50 RET
51 #undef tmp
52}
53void g(void) {
54 // g(i, t) -> t
55 // tempvars: `x` and `_`
56 #define tmp _
57 ANDI (t, 0x07)
58 MOV (tmp, i2)
59 ANDI (tmp, 3)
60 TST (tmp)
61 #undef tmp
62 BREQ (skip)
63 SUBI (t, -8)
64 skip:
65 t = data[t];
66 /*MOV X_hi==x, data_hi
67 MOV X_lo==t, data_lo
68 ADD X_lo, t
69 ADC X_hi, zero
70 LD t, X */
71 t = (((i1&0x1f)<<8|i0)*t)>>8; //TODO
72 RET //TODO: replace CALL/RET with IJMP?
73};
74
75int main(void) {
76 CLR (zero)
77 CLR (i0)
78 CLR (i1)
79 CLR (i2)
80 CLR (i3)
81 for (;;) {
82 MOV (n, i2)
83 LSL (n)
84 LSL (n)
85 #define tmp _
86 MOV (tmp, i1)
87 SWAP (tmp)
88 ANDI (tmp, 0x0f)
89 LSR (tmp)
90 LSR (tmp)
91 OR (n, tmp)
92 #undef tmp
93 MOV (s, i3)
94 ROR (s)
95 ROR (s)
96 ANDI (s, 0x80)
97 #define tmp _
98 MOV (tmp, i2)
99 LSR (tmp)
100 OR (s, tmp)
101 #undef tmp
102
103 //voice 1:
104 MOV (t, n)
105 RCALL g();
106 SWAP (t)
107 ANDI (t, 0x0f)
108 ANDI (t, 1)
109 MOV (acc, t)
110
111 //voice 2:
112 #define tmp _
113 MOV (tmp, i2)
114 LSL (tmp)
115 LSL (tmp)
116 LSL (tmp)
117 MOV (t, i1)
118 SWAP (t)
119 ANDI (t, 0xf)
120 LSR (t)
121 OR (t, tmp)
122 #undef tmp
123 EOR (t, n)
124 RCALL g();
125 LSR (t)
126 LSR (t)
127 ANDI (t, 3)
128 AND (t, s)
129 ADD (acc, t)
130
131 //voice 3:
132 MOV (Ml, i2)
133 SWAP (Ml)
134 ANDI (Ml, 0xf0)
135 LSL (Ml)
136 #define tmp _
137 MOV (tmp, i1)
138 LSR (tmp)
139 LSR (tmp)
140 LSR (tmp)
141 OR (Ml, tmp)
142 #undef tmp
143 MOV (Mh, i3)
144 SWAP (Mh)
145 ANDI (Mh, 0xf0)
146 LSL (Mh)
147 #define tmp _
148 MOV (tmp, i2)
149 LSR (tmp)
150 LSR (tmp)
151 LSR (tmp)
152 OR (Mh, tmp)
153 #undef tmp
154 RCALL mod3();
155 ADD (t, n)
156 RCALL g();
157 LSR (t)
158 LSR (t)
159 ANDI (t, 3)
160 MOV (x, s)
161 INC (x)
162 #define tmp _
163 MOV (tmp, x)
164 LSR (tmp)
165 LSR (tmp)
166 ADD (tmp, x)
167 ROR (tmp)
168 LSR (tmp)
169 ADD (tmp, x)
170 ROR (tmp)
171 LSR (tmp)
172 ADD (tmp, x)
173 ROR (tmp)
174 LSR (tmp)
175 MOV (x, tmp)
176 #undef tmp
177 AND (t, x)
178 ADD (acc, t)
179
180 //voice 4:
181 MOV (Ml, i2)
182 SWAP (Ml)
183 ANDI (Ml, 0xf0)
184 LSL (Ml)
185 LSL (Ml)
186 #define tmp _
187 MOV (tmp, i1)
188 LSR (tmp)
189 LSR (tmp)
190 OR (Ml, tmp)
191 #undef tmp
192 MOV (Mh, i3)
193 SWAP (Mh)
194 ANDI (Mh, 0xf0)
195 LSL (Mh)
196 LSL (Mh)
197 #define tmp _
198 MOV (tmp, i2)
199 LSR (tmp)
200 LSR (tmp)
201 OR (Mh, tmp)
202 #undef tmp
203 RCALL mod3();
204 SUB (t, n)
205 NEG (t)
206 SUBI (t, -8)
207 RCALL g();
208 LSR (t)
209 ANDI (t, 3)
210 MOV (x, s)
211 INC (x)
212 #define tmp _
213 MOV (tmp, x)
214 LSR (tmp)
215 ADD (tmp, x)
216 ROR (tmp)
217 LSR (tmp)
218 LSR (tmp)
219 ADD (tmp, x)
220 ROR (tmp)
221 ADD (tmp, x)
222 ROR (tmp)
223 LSR (tmp)
224 LSR (tmp)
225 MOV (x, tmp)
226 #undef tmp
227 AND (t, x)
228 ADD (acc, t)
229
230 putchar(acc<<4); //TODO
231 SUBI (i0, -1)
232 ADC (i1, zero, !i0)
233 ADC (i2, zero, !i0&&!i1)
234 ADC (i3, zero, !i0&&!i1&&!i2)
235 }
236}
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