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[Chiptunes.git] / foo.c
1 #include <stdio.h>
2 #include "fakeasm.h"
3 typedef unsigned char u8;
4
5 u8 data[] = {
6 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
7 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
8 };
9 u8 i0;
10 u8 i1;
11 u8 i2;
12 u8 i3;
13 u8 x;
14 u8 t;
15 u8 o;
16 void g(void) {
17 // g(i, x, t, o) -> t
18 u8 tmp;
19 ANDI (t, 0x07)
20 MOV (tmp, i2)
21 ANDI (tmp, 3)
22 TST (tmp)
23 BREQ (skip)
24 SUBI (t, -8)
25 skip:
26 t = data[t];
27 t = (((i1&0x1f)<<8|i0)*t)>>8 >> o;
28 AND (t, x)
29 ANDI (t, 3)
30 RET
31 };
32
33 int main(void) {
34 u8 n;
35 u8 s;
36 u8 acc;
37 //TODO: clear all vars/registers
38 for (;;) {
39 MOV (n, i2)
40 LSL (n)
41 LSL (n)
42 #define tmp acc
43 MOV (tmp, i1)
44 SWAP (tmp)
45 ANDI (tmp, 0x0f)
46 LSR (tmp)
47 LSR (tmp)
48 OR (n, tmp)
49 #undef tmp
50 MOV (s, i3)
51 ROR (s)
52 ROR (s)
53 ANDI (s, 0x80)
54 #define tmp acc
55 MOV (tmp, i2)
56 LSR (tmp)
57 OR (s, tmp)
58 #undef tmp
59
60 //voice 1:
61 LDI (x, 1)
62 MOV (t, n)
63 LDI (o, 4)
64 RCALL g();
65 MOV (acc, t)
66
67 //voice 2:
68 MOV (x, s)
69 #define tmp o
70 MOV (tmp, i2)
71 LSL (tmp)
72 LSL (tmp)
73 LSL (tmp)
74 MOV (t, i1)
75 SWAP (t)
76 ANDI (t, 0xf)
77 LSR (t)
78 OR (t, tmp)
79 #undef tmp
80 EOR (t, n)
81 LDI (o, 2)
82 RCALL g();
83 ADD (acc, t)
84
85 //voice 3:
86 MOV (x, s)
87 INC (x)
88 #define tmp o
89 unsigned short sum = 0; //XXX
90 sum += x;
91 sum >>= 1;
92 //nop
93 sum >>= 1;
94 sum += x;
95 sum >>= 1;
96 //nop
97 sum >>= 1;
98 sum += x;
99 sum >>= 1;
100 //nop
101 sum >>= 1;
102 sum += x;
103 sum >>= 1;
104 //nop
105 sum >>= 1;
106 x = sum;
107 #undef tmp
108 t = ((i3&0x01)<<13 | i2<<5 | i1>>3) % 3;
109 ADD (t, n)
110 LDI (o, 2)
111 RCALL g();
112 ADD (acc, t)
113
114 //voice 4:
115 MOV (x, s)
116 INC (x)
117 #define tmp o
118 sum = 0; //XXX
119 sum += x;
120 sum >>= 1;
121 sum += x;
122 sum >>= 1;
123 //nop
124 sum >>= 1;
125 //nop
126 sum >>= 1;
127 sum += x;
128 sum >>= 1;
129 sum += x;
130 sum >>= 1;
131 //nop
132 sum >>= 1;
133 //nop
134 sum >>= 1;
135 x = sum;
136 #undef tmp
137 t = ((i3&0x01)<<14 | i2<<6 | i1>>2) % 3;
138 SUB (t, n)
139 NEG (t)
140 SUBI (t, -8)
141 LDI (o, 1)
142 RCALL g();
143 ADD (acc, t)
144
145 putchar(acc<<4);
146 #define tmp acc
147 LDI (tmp, 0)
148 SUBI (i0, -1)
149 ADC (i1, tmp, !i0)
150 ADC (i2, tmp, !i0&&!i1)
151 ADC (i3, tmp, !i0&&!i1&&!i2)
152 #undef tmp
153 }
154 }
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