]> git.gir.st - Chiptunes.git/blob - foo.c
1497b21174d209da4ed009e8111850ba7cd9d059
[Chiptunes.git] / foo.c
1 #include <stdio.h>
2 #include "fakeasm.h"
3 typedef unsigned char u8;
4
5 u8 data[] = {
6 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
7 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
8 };
9 u8 i0;
10 u8 i1;
11 u8 i2;
12 u8 i3;
13 u8 x;
14 u8 t;
15 u8 o;
16 void g(void) {
17 // g(i, x, t, o) -> t
18 u8 tmp;
19 ANDI (t, 0x07)
20 MOV (tmp, i2)
21 ANDI (tmp, 3)
22 TST (tmp)
23 BREQ (skip)
24 SUBI (t, -8)
25 skip:
26 t = data[t];
27 t = (((i1&0x1f)<<8|i0)*t)>>8 >> o;
28 AND (t, x)
29 ANDI (t, 3)
30 RET
31 };
32
33 int main(void) {
34 u8 n;
35 u8 s;
36 u8 acc;
37 //TODO: clear all vars/registers
38 for (;;) {
39 MOV (n, i2)
40 LSL (n)
41 LSL (n)
42 #define tmp acc
43 MOV (tmp, i1)
44 SWAP (tmp)
45 ANDI (tmp, 0x0f)
46 LSR (tmp)
47 LSR (tmp)
48 OR (n, tmp)
49 #undef tmp
50 MOV (s, i3)
51 ROR (s)
52 ROR (s)
53 ANDI (s, 0x80)
54 #define tmp acc
55 MOV (tmp, i2)
56 LSR (tmp)
57 OR (s, tmp)
58 #undef tmp
59
60 //voice 1:
61 LDI (x, 1)
62 MOV (t, n)
63 LDI (o, 4)
64 RCALL g();
65 MOV (acc, t)
66
67 //voice 2:
68 MOV (x, s)
69 #define tmp o
70 MOV (tmp, i2)
71 LSL (tmp)
72 LSL (tmp)
73 LSL (tmp)
74 MOV (t, i1)
75 SWAP (t)
76 ANDI (t, 0xf)
77 LSR (t)
78 OR (t, tmp)
79 #undef tmp
80 EOR (t, n)
81 LDI (o, 2)
82 RCALL g();
83 ADD (acc, t)
84
85 //voice 3:
86 MOV (x, s)
87 INC (x)
88 #define tmp o
89 MOV (tmp, x)
90 LSR (tmp)
91 LSR (tmp)
92 ADD (tmp, x)
93 ROR (tmp)
94 LSR (tmp)
95 ADD (tmp, x)
96 ROR (tmp)
97 LSR (tmp)
98 ADD (tmp, x)
99 ROR (tmp)
100 LSR (tmp)
101 MOV (x, tmp)
102 #undef tmp
103 t = ((i3&0x01)<<13 | i2<<5 | i1>>3) % 3;
104 ADD (t, n)
105 LDI (o, 2)
106 RCALL g();
107 ADD (acc, t)
108
109 //voice 4:
110 MOV (x, s)
111 INC (x)
112 #define tmp o
113 MOV (tmp, x)
114 LSR (tmp)
115 ADD (tmp, x)
116 ROR (tmp)
117 LSR (tmp)
118 LSR (tmp)
119 ADD (tmp, x)
120 ROR (tmp)
121 ADD (tmp, x)
122 ROR (tmp)
123 LSR (tmp)
124 LSR (tmp)
125 MOV (x, tmp)
126 #undef tmp
127 t = ((i3&0x01)<<14 | i2<<6 | i1>>2) % 3;
128 SUB (t, n)
129 NEG (t)
130 SUBI (t, -8)
131 LDI (o, 1)
132 RCALL g();
133 ADD (acc, t)
134
135 putchar(acc<<4);
136 #define tmp acc
137 CLR (tmp) //NOTE: maybe use dedicated zero register?
138 SUBI (i0, -1)
139 ADC (i1, tmp, !i0)
140 ADC (i2, tmp, !i0&&!i1)
141 ADC (i3, tmp, !i0&&!i1&&!i2)
142 #undef tmp
143 }
144 }
Imprint / Impressum