foo.c

   1 #include <stdio.h>
   2 #include "fakeasm.h"
   3 typedef unsigned char u8;
   4
   5 u8 data[] = {
   6         0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
   7         0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
   8 };
   9 u8 zero; //zero register
  10 u8 i0;
  11 u8 i1;
  12 u8 i2;
  13 u8 i3;
  14 u8 x;
  15 u8 t;
  16 u8 o;
  17 u8 _;
  18 #define Mh o //mod3 vars
  19 #define Ml t // -"-
  20 void mod3(void) { //avail: t, o _
  21 //http://homepage.divms.uiowa.edu/~jones/bcd/mod.shtml
  22     #define tmp _
  23         ADD     (Ml, Mh)
  24         CLR     (Mh)
  25         ADC     (Mh, zero, carry) //Mh only holds the carry bit
  26         MOV     (tmp, Ml)
  27         SWAP    (tmp)
  28         ANDI    (tmp, 0x0f)
  29         SWAP    (Mh)
  30         OR      (tmp, Mh)
  31         ANDI    (Ml, 0x0f)
  32         ADD     (Ml, tmp)
  33         MOV     (tmp, Ml)
  34         LSR     (tmp)
  35         LSR     (tmp)
  36         ANDI    (Ml, 0x03)
  37         ADD     (Ml, tmp)
  38         MOV     (tmp, Ml)
  39         LSR     (tmp)
  40         LSR     (tmp)
  41         ANDI    (Ml, 0x03)
  42         ADD     (Ml, tmp)
  43     if (Ml > 2) Ml = Ml - 3;
  44     #undef tmp
  45 }
  46 void g(void) {
  47         // g(i, x, t, o) -> t
  48         #define tmp _
  49         ANDI    (t, 0x07)
  50         MOV     (tmp, i2)
  51         ANDI    (tmp, 3)
  52         TST     (tmp)
  53         #undef tmp
  54         BREQ    (skip)
  55         SUBI    (t, -8)
  56         skip:
  57         t = data[t];
  58         /*MOV X_hi==_, data_hi
  59           MOV X_lo==t, data_lo
  60           ADD X_lo, t
  61           ADC X_hi, zero
  62           LD  t, X         */
  63         t = (((i1&0x1f)<<8|i0)*t)>>8; //TODO
  64         t >>= o; //NOTE: o == {1, 2, 4}
  65         AND     (t, x)
  66         ANDI    (t, 3)
  67         RET
  68 };
  69
  70 int main(void) {
  71         u8 n;
  72         u8 s;
  73         u8 acc;
  74         //TODO: clear all vars/registers
  75         for (;;) {
  76                 MOV     (n, i2)
  77                 LSL     (n)
  78                 LSL     (n)
  79                 #define tmp acc
  80                 MOV     (tmp, i1)
  81                 SWAP    (tmp)
  82                 ANDI    (tmp, 0x0f)
  83                 LSR     (tmp)
  84                 LSR     (tmp)
  85                 OR      (n, tmp)
  86                 #undef tmp
  87                 MOV     (s, i3)
  88                 ROR     (s)
  89                 ROR     (s)
  90                 ANDI    (s, 0x80)
  91                 #define tmp acc
  92                 MOV     (tmp, i2)
  93                 LSR     (tmp)
  94                 OR      (s, tmp)
  95                 #undef tmp
  96
  97                 //voice 1:
  98                 LDI     (x, 1)
  99                 MOV     (t, n)
 100                 LDI     (o, 4)
 101                 RCALL   g();
 102                 MOV     (acc, t)
 103
 104                 //voice 2:
 105                 MOV     (x, s)
 106                 #define tmp o
 107                 MOV     (tmp, i2)
 108                 LSL     (tmp)
 109                 LSL     (tmp)
 110                 LSL     (tmp)
 111                 MOV     (t, i1)
 112                 SWAP    (t)
 113                 ANDI    (t, 0xf)
 114                 LSR     (t)
 115                 OR      (t, tmp)
 116                 #undef tmp
 117                 EOR     (t, n)
 118                 LDI     (o, 2)
 119                 RCALL   g();
 120                 ADD     (acc, t)
 121
 122                 //voice 3:
 123                 MOV     (x, s)
 124                 INC     (x)
 125                 #define tmp o
 126                 MOV     (tmp, x)
 127                 LSR     (tmp)
 128                 LSR     (tmp)
 129                 ADD     (tmp, x)
 130                 ROR     (tmp)
 131                 LSR     (tmp)
 132                 ADD     (tmp, x)
 133                 ROR     (tmp)
 134                 LSR     (tmp)
 135                 ADD     (tmp, x)
 136                 ROR     (tmp)
 137                 LSR     (tmp)
 138                 MOV     (x, tmp)
 139                 #undef tmp
 140                 Ml = i2<<5 | i1>>3;
 141                 Mh = i3<<5 | i2>>3;
 142                 RCALL   mod3();
 143                 ADD     (t, n)
 144                 LDI     (o, 2)
 145                 RCALL   g();
 146                 ADD     (acc, t)
 147
 148                 //voice 4:
 149                 MOV     (x, s)
 150                 INC     (x)
 151                 #define tmp o
 152                 MOV     (tmp, x)
 153                 LSR     (tmp)
 154                 ADD     (tmp, x)
 155                 ROR     (tmp)
 156                 LSR     (tmp)
 157                 LSR     (tmp)
 158                 ADD     (tmp, x)
 159                 ROR     (tmp)
 160                 ADD     (tmp, x)
 161                 ROR     (tmp)
 162                 LSR     (tmp)
 163                 LSR     (tmp)
 164                 MOV     (x, tmp)
 165                 #undef tmp
 166                 Ml = i2<<6 | i1>>2;
 167                 Mh = i3<<6 | i2>>2;
 168                 RCALL   mod3();
 169                 SUB     (t, n)
 170                 NEG     (t)
 171                 SUBI    (t, -8)
 172                 LDI     (o, 1)
 173                 RCALL   g();
 174                 ADD     (acc, t)
 175
 176                 putchar(acc<<4); //TODO
 177                 SUBI    (i0, -1)
 178                 ADC     (i1, zero, !i0)
 179                 ADC     (i2, zero, !i0&&!i1)
 180                 ADC     (i3, zero, !i0&&!i1&&!i2)
 181         }
 182 }