foo.c

   1 #include <stdio.h>
   2 #include "fakeasm.h"
   3 typedef unsigned char u8;
   4
   5 u8 data[] = {
   6         0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
   7         0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
   8 };
   9 u8 zero; //zero register
  10 u8 i0;
  11 u8 i1;
  12 u8 i2;
  13 u8 i3;
  14 u8 x;
  15 u8 t;
  16 u8 o;
  17 u8 _;
  18 #define Mh o //mod3 vars
  19 #define Ml t // -"-
  20 //http://homepage.divms.uiowa.edu/~jones/bcd/mod.shtml
  21 void mod3(void) {
  22         // mod3(Mh.Ml) -> t
  23         #define tmp _
  24         ADD     (Ml, Mh)
  25         CLR     (Mh)
  26         ADC     (Mh, zero, carry) //Mh only holds the carry bit
  27         MOV     (tmp, Ml)
  28         SWAP    (tmp)
  29         ANDI    (tmp, 0x0f)
  30         SWAP    (Mh)
  31         OR      (tmp, Mh)
  32         ANDI    (Ml, 0x0f)
  33         ADD     (Ml, tmp)
  34         MOV     (tmp, Ml)
  35         LSR     (tmp)
  36         LSR     (tmp)
  37         ANDI    (Ml, 0x03)
  38         ADD     (Ml, tmp)
  39         MOV     (tmp, Ml)
  40         LSR     (tmp)
  41         LSR     (tmp)
  42         ANDI    (Ml, 0x03)
  43         ADD     (Ml, tmp)
  44         CPI     (Ml, 3)
  45         BRPL    (skip)
  46         SUBI    (Ml, 3)
  47         skip:;
  48         RET
  49         #undef tmp
  50 }
  51 void g(void) {
  52         // g(i, t) -> t
  53         // tempvars: `x` and `_`
  54         #define tmp _
  55         ANDI    (t, 0x07)
  56         MOV     (tmp, i2)
  57         ANDI    (tmp, 3)
  58         TST     (tmp)
  59         #undef tmp
  60         BREQ    (skip)
  61         SUBI    (t, -8)
  62         skip:
  63         t = data[t];
  64         /*MOV X_hi==_, data_hi
  65           MOV X_lo==t, data_lo
  66           ADD X_lo, t
  67           ADC X_hi, zero
  68           LD  t, X         */
  69         t = (((i1&0x1f)<<8|i0)*t)>>8; //TODO
  70         RET //TODO: CALL/RET is expensive; store PC in register and RJMP, then JRMP back
  71 };
  72
  73 int main(void) {
  74         u8 n;
  75         u8 s;
  76         u8 acc;
  77         //TODO: clear all vars/registers
  78         for (;;) {
  79                 MOV     (n, i2)
  80                 LSL     (n)
  81                 LSL     (n)
  82                 #define tmp acc
  83                 MOV     (tmp, i1)
  84                 SWAP    (tmp)
  85                 ANDI    (tmp, 0x0f)
  86                 LSR     (tmp)
  87                 LSR     (tmp)
  88                 OR      (n, tmp)
  89                 #undef tmp
  90                 MOV     (s, i3)
  91                 ROR     (s)
  92                 ROR     (s)
  93                 ANDI    (s, 0x80)
  94                 #define tmp acc
  95                 MOV     (tmp, i2)
  96                 LSR     (tmp)
  97                 OR      (s, tmp)
  98                 #undef tmp
  99
 100                 //voice 1:
 101                 MOV     (t, n)
 102                 RCALL   g();
 103                 LDI     (o, 4)
 104                 SWAP    (t)
 105                 ANDI    (t, 0x0f)
 106                 ANDI    (t, 1)
 107                 MOV     (acc, t)
 108
 109                 //voice 2:
 110                 #define tmp o
 111                 MOV     (tmp, i2)
 112                 LSL     (tmp)
 113                 LSL     (tmp)
 114                 LSL     (tmp)
 115                 MOV     (t, i1)
 116                 SWAP    (t)
 117                 ANDI    (t, 0xf)
 118                 LSR     (t)
 119                 OR      (t, tmp)
 120                 #undef tmp
 121                 EOR     (t, n)
 122                 LDI     (o, 2)
 123                 RCALL   g();
 124         t >>= o; //NOTE: o == {1, 2, 4}
 125         ANDI    (t, 3)
 126                 AND     (t, s)
 127                 ADD     (acc, t)
 128
 129                 //voice 3:
 130                 MOV     (Ml, i2)
 131                 SWAP    (Ml)
 132                 ANDI    (Ml, 0xf0)
 133                 LSL     (Ml)
 134                 #define tmp Mh
 135                 MOV     (tmp, i1)
 136                 LSR     (tmp)
 137                 LSR     (tmp)
 138                 LSR     (tmp)
 139                 OR      (Ml, tmp)
 140                 #undef tmp
 141                 MOV     (Mh, i3)
 142                 SWAP    (Mh)
 143                 ANDI    (Mh, 0xf0)
 144                 LSL     (Mh)
 145                 #define tmp _
 146                 MOV     (tmp, i2)
 147                 LSR     (tmp)
 148                 LSR     (tmp)
 149                 LSR     (tmp)
 150                 OR      (Mh, tmp)
 151                 #undef tmp
 152                 RCALL   mod3();
 153                 ADD     (t, n)
 154                 LDI     (o, 2)
 155                 RCALL   g();
 156         t >>= o; //NOTE: o == {1, 2, 4}
 157         ANDI    (t, 3)
 158                 MOV     (x, s)
 159                 INC     (x)
 160                 #define tmp o
 161                 MOV     (tmp, x)
 162                 LSR     (tmp)
 163                 LSR     (tmp)
 164                 ADD     (tmp, x)
 165                 ROR     (tmp)
 166                 LSR     (tmp)
 167                 ADD     (tmp, x)
 168                 ROR     (tmp)
 169                 LSR     (tmp)
 170                 ADD     (tmp, x)
 171                 ROR     (tmp)
 172                 LSR     (tmp)
 173                 MOV     (x, tmp)
 174                 #undef tmp
 175                 AND     (t, x)
 176                 ADD     (acc, t)
 177
 178                 //voice 4:
 179                 MOV     (Ml, i2)
 180                 SWAP    (Ml)
 181                 ANDI    (Ml, 0xf0)
 182                 LSL     (Ml)
 183                 LSL     (Ml)
 184                 #define tmp Mh
 185                 MOV     (tmp, i1)
 186                 LSR     (tmp)
 187                 LSR     (tmp)
 188                 OR      (Ml, tmp)
 189                 #undef tmp
 190                 MOV     (Mh, i3)
 191                 SWAP    (Mh)
 192                 ANDI    (Mh, 0xf0)
 193                 LSL     (Mh)
 194                 LSL     (Mh)
 195                 #define tmp _
 196                 MOV     (tmp, i2)
 197                 LSR     (tmp)
 198                 LSR     (tmp)
 199                 OR      (Mh, tmp)
 200                 #undef tmp
 201                 RCALL   mod3();
 202                 SUB     (t, n)
 203                 NEG     (t)
 204                 SUBI    (t, -8)
 205                 LDI     (o, 1)
 206                 RCALL   g();
 207         t >>= o; //NOTE: o == {1, 2, 4}
 208         ANDI    (t, 3)
 209                 MOV     (x, s)
 210                 INC     (x)
 211                 #define tmp o
 212                 MOV     (tmp, x)
 213                 LSR     (tmp)
 214                 ADD     (tmp, x)
 215                 ROR     (tmp)
 216                 LSR     (tmp)
 217                 LSR     (tmp)
 218                 ADD     (tmp, x)
 219                 ROR     (tmp)
 220                 ADD     (tmp, x)
 221                 ROR     (tmp)
 222                 LSR     (tmp)
 223                 LSR     (tmp)
 224                 MOV     (x, tmp)
 225                 #undef tmp
 226                 AND     (t, x)
 227                 ADD     (acc, t)
 228
 229                 putchar(acc<<4); //TODO
 230                 SUBI    (i0, -1)
 231                 ADC     (i1, zero, !i0)
 232                 ADC     (i2, zero, !i0&&!i1)
 233                 ADC     (i3, zero, !i0&&!i1&&!i2)
 234         }
 235 }