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[Chiptunes.git] / foo.c
1 #include <stdio.h>
2 #include "fakeasm.h"
3 typedef unsigned char u8;
4
5 u8 data[] = {
6 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
7 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
8 };
9 u8 zero; //zero register
10 u8 i0;
11 u8 i1;
12 u8 i2;
13 u8 i3;
14 u8 x;
15 u8 t;
16 u8 o;
17 u8 _;
18 #define Mh o //mod3 vars
19 #define Ml t // -"-
20 void mod3(void) { //avail: t, o _
21 //http://homepage.divms.uiowa.edu/~jones/bcd/mod.shtml
22 #define tmp _
23 //unsigned short a = ((Mh) + (Ml)) ;//&0x1ff;
24 // Mh = a>>8; //1 bit
25 // Ml = a;
26 ADD (Ml, Mh)
27 CLR (Mh)
28 ADC (Mh, zero, carry)
29 Ml = (Mh<<4|Ml>>4) + (Ml & 0xF);
30 Ml = (Ml >> 2) + (Ml & 0x3);
31 Ml = (Ml >> 2) + (Ml & 0x3);
32 if (Ml > 2) Ml = Ml - 3;
33 #undef tmp
34 }
35 void g(void) {
36 // g(i, x, t, o) -> t
37 #define tmp _
38 ANDI (t, 0x07)
39 MOV (tmp, i2)
40 ANDI (tmp, 3)
41 TST (tmp)
42 #undef tmp
43 BREQ (skip)
44 SUBI (t, -8)
45 skip:
46 t = data[t];
47 /*MOV X_hi==_, data_hi
48 MOV X_lo==t, data_lo
49 ADD X_lo, t
50 ADC X_hi, zero
51 LD t, X */
52 t = (((i1&0x1f)<<8|i0)*t)>>8; //TODO
53 t >>= o; //NOTE: o == {1, 2, 4}
54 AND (t, x)
55 ANDI (t, 3)
56 RET
57 };
58
59 int main(void) {
60 u8 n;
61 u8 s;
62 u8 acc;
63 //TODO: clear all vars/registers
64 for (;;) {
65 MOV (n, i2)
66 LSL (n)
67 LSL (n)
68 #define tmp acc
69 MOV (tmp, i1)
70 SWAP (tmp)
71 ANDI (tmp, 0x0f)
72 LSR (tmp)
73 LSR (tmp)
74 OR (n, tmp)
75 #undef tmp
76 MOV (s, i3)
77 ROR (s)
78 ROR (s)
79 ANDI (s, 0x80)
80 #define tmp acc
81 MOV (tmp, i2)
82 LSR (tmp)
83 OR (s, tmp)
84 #undef tmp
85
86 //voice 1:
87 LDI (x, 1)
88 MOV (t, n)
89 LDI (o, 4)
90 RCALL g();
91 MOV (acc, t)
92
93 //voice 2:
94 MOV (x, s)
95 #define tmp o
96 MOV (tmp, i2)
97 LSL (tmp)
98 LSL (tmp)
99 LSL (tmp)
100 MOV (t, i1)
101 SWAP (t)
102 ANDI (t, 0xf)
103 LSR (t)
104 OR (t, tmp)
105 #undef tmp
106 EOR (t, n)
107 LDI (o, 2)
108 RCALL g();
109 ADD (acc, t)
110
111 //voice 3:
112 MOV (x, s)
113 INC (x)
114 #define tmp o
115 MOV (tmp, x)
116 LSR (tmp)
117 LSR (tmp)
118 ADD (tmp, x)
119 ROR (tmp)
120 LSR (tmp)
121 ADD (tmp, x)
122 ROR (tmp)
123 LSR (tmp)
124 ADD (tmp, x)
125 ROR (tmp)
126 LSR (tmp)
127 MOV (x, tmp)
128 #undef tmp
129 Ml = i2<<5 | i1>>3;
130 Mh = i3<<5 | i2>>3;
131 RCALL mod3();
132 ADD (t, n)
133 LDI (o, 2)
134 RCALL g();
135 ADD (acc, t)
136
137 //voice 4:
138 MOV (x, s)
139 INC (x)
140 #define tmp o
141 MOV (tmp, x)
142 LSR (tmp)
143 ADD (tmp, x)
144 ROR (tmp)
145 LSR (tmp)
146 LSR (tmp)
147 ADD (tmp, x)
148 ROR (tmp)
149 ADD (tmp, x)
150 ROR (tmp)
151 LSR (tmp)
152 LSR (tmp)
153 MOV (x, tmp)
154 #undef tmp
155 Ml = i2<<6 | i1>>2;
156 Mh = i3<<6 | i2>>2;
157 RCALL mod3();
158 SUB (t, n)
159 NEG (t)
160 SUBI (t, -8)
161 LDI (o, 1)
162 RCALL g();
163 ADD (acc, t)
164
165 putchar(acc<<4); //TODO
166 SUBI (i0, -1)
167 ADC (i1, zero, !i0)
168 ADC (i2, zero, !i0&&!i1)
169 ADC (i3, zero, !i0&&!i1&&!i2)
170 }
171 }
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