cfb459868eccfa90c0f7c7a2cf42e17e49904be8
[Chiptunes.git] / fakeasm.h
1 #define c3(x) (0xff & (x>>24))
2 #define c2(x) (0xff & (x>>16))
3 #define c1(x) (0xff & (x>> 8))
4 #define c0(x) (0xff & (x ))
5 #define LSL(x) carry = x>>7; x <<= 1;
6 #define LSR(x) carry = x&1; x >>= 1;
7 #define SWAP(x) x = ((x & 0x0F) << 4 | (x & 0xF0) >> 4);
8 #define AND(x,y) x &= y;
9 #define ANDI(x,n) x &= n;
10 #define OR(x,y) x |= y;
11 #define ORI(x,n) x |= n;
12 #define EOR(x,y) x ^= y;
13 #define ADD(x,y) carry = (x+y)>>8; x += y;
14 #define ADC(x,y,c)x += y; x+=c; //TODO: carry
15 #define SUB(x,y) x -= y; //TODO: carry
16 #define SUBI(x,n) x -= (u8)n; //TODO: carry
17 #define INC(x) x++; //WARN: does not set carry
18 #define MOV(x,y) x = y;
19 #define LDI(x,n) x = n;
20 #define SBRC(x,b) if (x & b) //skip if cleared => do if set
21 #define CLR(x) x = 0;
22 #define RET return;
23 #define RCALL //pseudo
24 int sr_zero = 0; //status register zero bit
25 #define TST(x) if(x==0)sr_zero=1;else sr_zero=0; //WARN: not a complete TST mockup
26 #define BREQ(l) if(sr_zero) goto l;
27 int carry = 0; //status register carry bit //WARN: not respected by all mocked instructions
28 int asmtmp = 0;
29 #define ROL(x) asmtmp = x>>7; x <<= 1; x |= carry; carry = asmtmp;
30 #define ROR(x) asmtmp = x&0x1; x >>= 1; x |= carry<<7; carry = asmtmp;
31 #define NEG(x) x *= -1;
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