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[Chiptunes.git] / foo.c
1 #include <stdio.h>
2 #include "fakeasm.h"
3 typedef unsigned char u8;
4
5 u8 data[] = {
6 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
7 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
8 };
9 u8 zero; //zero register
10 u8 i0;
11 u8 i1;
12 u8 i2;
13 u8 i3;
14 u8 x;
15 u8 t;
16 u8 o;
17 u8 _;
18 #define Mh o //mod3 vars
19 #define Ml _ // -"-
20 #define Mr t // -"-
21 u8 mod3(u8 hi, u8 lo) { //avail: t, o _
22 //http://homepage.divms.uiowa.edu/~jones/bcd/mod.shtml
23 unsigned short a = ((hi) + (lo)) &0x1ff;
24 hi = a>>8; //1 bit
25 lo = a;
26 lo = (hi<<4|lo>>4) + (lo & 0xF);
27 lo = (lo >> 2) + (lo & 0x3);
28 lo = (lo >> 2) + (lo & 0x3);
29 if (lo > 2) lo = lo - 3;
30 return lo;
31 }
32 void g(void) {
33 // g(i, x, t, o) -> t
34 #define tmp _
35 ANDI (t, 0x07)
36 MOV (tmp, i2)
37 ANDI (tmp, 3)
38 TST (tmp)
39 #undef tmp
40 BREQ (skip)
41 SUBI (t, -8)
42 skip:
43 t = data[t];
44 /*MOV X_hi==_, data_hi
45 MOV X_lo==t, data_lo
46 ADD X_lo, t
47 ADC X_hi, zero
48 LD t, X */
49 t = (((i1&0x1f)<<8|i0)*t)>>8; //TODO
50 t >>= o; //NOTE: o == {1, 2, 4}
51 AND (t, x)
52 ANDI (t, 3)
53 RET
54 };
55
56 int main(void) {
57 u8 n;
58 u8 s;
59 u8 acc;
60 //TODO: clear all vars/registers
61 for (;;) {
62 MOV (n, i2)
63 LSL (n)
64 LSL (n)
65 #define tmp acc
66 MOV (tmp, i1)
67 SWAP (tmp)
68 ANDI (tmp, 0x0f)
69 LSR (tmp)
70 LSR (tmp)
71 OR (n, tmp)
72 #undef tmp
73 MOV (s, i3)
74 ROR (s)
75 ROR (s)
76 ANDI (s, 0x80)
77 #define tmp acc
78 MOV (tmp, i2)
79 LSR (tmp)
80 OR (s, tmp)
81 #undef tmp
82
83 //voice 1:
84 LDI (x, 1)
85 MOV (t, n)
86 LDI (o, 4)
87 RCALL g();
88 MOV (acc, t)
89
90 //voice 2:
91 MOV (x, s)
92 #define tmp o
93 MOV (tmp, i2)
94 LSL (tmp)
95 LSL (tmp)
96 LSL (tmp)
97 MOV (t, i1)
98 SWAP (t)
99 ANDI (t, 0xf)
100 LSR (t)
101 OR (t, tmp)
102 #undef tmp
103 EOR (t, n)
104 LDI (o, 2)
105 RCALL g();
106 ADD (acc, t)
107
108 //voice 3:
109 MOV (x, s)
110 INC (x)
111 #define tmp o
112 MOV (tmp, x)
113 LSR (tmp)
114 LSR (tmp)
115 ADD (tmp, x)
116 ROR (tmp)
117 LSR (tmp)
118 ADD (tmp, x)
119 ROR (tmp)
120 LSR (tmp)
121 ADD (tmp, x)
122 ROR (tmp)
123 LSR (tmp)
124 MOV (x, tmp)
125 #undef tmp
126 Ml = i2<<5 | i1>>3;
127 Mh = i3<<5 | i2>>3;
128 t = mod3(Mh,Ml); //TODO
129 ADD (t, n)
130 LDI (o, 2)
131 RCALL g();
132 ADD (acc, t)
133
134 //voice 4:
135 MOV (x, s)
136 INC (x)
137 #define tmp o
138 MOV (tmp, x)
139 LSR (tmp)
140 ADD (tmp, x)
141 ROR (tmp)
142 LSR (tmp)
143 LSR (tmp)
144 ADD (tmp, x)
145 ROR (tmp)
146 ADD (tmp, x)
147 ROR (tmp)
148 LSR (tmp)
149 LSR (tmp)
150 MOV (x, tmp)
151 #undef tmp
152 Ml = i2<<6 | i1>>2;
153 Mh = i3<<6 | i2>>2;
154 t = mod3(Mh,Ml); //TODO
155 SUB (t, n)
156 NEG (t)
157 SUBI (t, -8)
158 LDI (o, 1)
159 RCALL g();
160 ADD (acc, t)
161
162 putchar(acc<<4); //TODO
163 SUBI (i0, -1)
164 ADC (i1, zero, !i0)
165 ADC (i2, zero, !i0&&!i1)
166 ADC (i3, zero, !i0&&!i1&&!i2)
167 }
168 }
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