X-Git-Url: https://git.gir.st/Chiptunes.git/blobdiff_plain/61fab018385760846689343362a188577f87b1b6..e389879f63ee13e638364da4a624a1b3d137f8a5:/foo.c diff --git a/foo.c b/foo.c index e1fb86d..6c1e738 100644 --- a/foo.c +++ b/foo.c @@ -1,20 +1,108 @@ #include +#include "fakeasm.h" typedef unsigned char u8; -int g(int i, int x, int t, int o) { - return ((3 & x & - (i * - ((3 & i >> 16 ? "BY}6YB6%" : "Qj}6jQ6%")[t % 8] + - 51) >> o)) << 4); + +u8 data[] = { + 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58, + 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58 +}; +u8 i0; +u8 i1; +u8 i2; +u8 i3; +u8 x; +u8 t; +u8 o; +void g(void) { + // g(i, x, t, o) -> t + u8 tmp; + ANDI (t, 0x07) + MOV (tmp, i2) + ANDI (tmp, 3) + TST (tmp) + BREQ (skip) + SUBI (t, -8) + skip: + t = data[t]; + t = ((i3<<24|i2<<16|i1<<8|i0)*t) >> o; + AND (t, x) + ANDI (t, 3) + RET }; int main(void) { -int i; -int n; -int s; - for (i = 0;; i++) { - putchar(g(i, 1, n = i >> 14, 12) + - g(i, s = i >> 17, n ^ i >> 13, 10) + - g(i, s / 3, n + ((i >> 11) % 3), 10) + - g(i, s / 5, 8 + n - ((i >> 10) % 3), 9)); - } + u8 n; + u8 s; + u8 acc; + //TODO: clear all vars/registers + for (;;) { + MOV (n, i2) + LSL (n) + LSL (n) + #define tmp acc + MOV (tmp, i1) + SWAP (tmp) + ANDI (tmp, 0x0f) + LSR (tmp) + LSR (tmp) + OR (n, tmp) + #undef tmp + MOV (s, i3) + ROR (s) + ROR (s) + ANDI (s, 0x80) + #define tmp acc + MOV (tmp, i2) + LSR (tmp) + OR (s, tmp) + #undef tmp + + //voice 1: + LDI (x, 1) + MOV (t, n) + LDI (o, 12) + RCALL g(); + MOV (acc, t) + + //voice 2: + MOV (x, s) + #define tmp o + MOV (tmp, i2) + LSL (tmp) + LSL (tmp) + LSL (tmp) + MOV (t, i1) + SWAP (t) + ANDI (t, 0xf) + LSR (t) + OR (t, tmp) + #undef tmp + EOR (t, n) + LDI (o, 10) + RCALL g(); + ADD (acc, t) + + //voice 3: + x = s / 3; + t = n + ((i3<<13 | i2<<5 | i1>>3) % 3); + LDI (o, 10) + RCALL g(); + ADD (acc, t) + + //voice 4: + x = s / 5; + t = 8 + n - ((i3<<14 | i2<<6 | i1>>2) % 3); + LDI (o, 9) + RCALL g(); + ADD (acc, t) + + putchar(acc<<4); + #define tmp acc + LDI (tmp, 0) + SUBI (i0, -1) + ADC (i1, tmp, !i0) + ADC (i2, tmp, !i0&&!i1) + ADC (i3, tmp, !i0&&!i1&&!i2) + #undef tmp + } }