From: Tobias Girstmair Date: Sat, 17 Nov 2018 19:53:38 +0000 (+0100) Subject: new version X-Git-Tag: attiny9~38 X-Git-Url: https://git.gir.st/Chiptunes.git/commitdiff_plain/7b96a97d74795acb20cac1df4a5aaebbe8027419?hp=9e62fea4b39c7deebe9def83e22778cb806aa8de;ds=sidebyside new version --- diff --git a/fakeasm.h b/fakeasm.h index cffa6d8..de0898f 100644 --- a/fakeasm.h +++ b/fakeasm.h @@ -17,7 +17,8 @@ #define INC(x) x++; //WARN: does not set carry #define MOV(x,y) x = y; #define LDI(x,n) x = n; -#define SBRC(x,b) if (x & b) //skip if cleared => do if set +#define SBRC(x,b) if (x & 1< do if set +#define SBRS(x,b) if (!(x & 1< do if not #define CLR(x) x = 0; #define RET return; #define RCALL //pseudo @@ -32,3 +33,4 @@ int asmtmp = 0; int sr_neg = 0; #define CPI(x,n) sr_neg = (x-n < 0); //WARN: not a complete CPI mockup #define BRPL(l) if (sr_neg) goto l; +#define RJMP(l) goto l; diff --git a/foo.c b/foo.c index c9856b9..36cb7cd 100644 --- a/foo.c +++ b/foo.c @@ -82,10 +82,13 @@ void g(void) { #define a0 t for (u8 loop = 0; loop < 8; loop++) { //Note: t&2 always zero + SBRS (t, 0) + goto skip2; if (t & 1) { ADD (a1, i0) ADC (a2, i1, carry) } + skip2: LSR (a2) ROR (a1) ROR (t)