Change layer pram and keymap of HHKB. Fix vusb/host.c.
[tmk_keyboard.git] / ps2_usb / config_vusb.h
CommitLineData
4f5f1a53 1#ifndef CONFIG_H
2#define CONFIG_H
3
4
5#define VENDOR_ID 0xFEED
47f5d8b5 6#define PRODUCT_ID 0x2233
7// TODO: share these strings with usbconfig.h
8// Edit usbconfig.h to change these.
4f5f1a53 9#define MANUFACTURER t.m.k.
10#define PRODUCT PS/2 keyboard converter
11#define DESCRIPTION convert PS/2 keyboard to USB
12
fb8d23c6 13
4f5f1a53 14/* matrix size */
15#define MATRIX_ROWS 32 // keycode bit: 3-0
16#define MATRIX_COLS 8 // keycode bit: 6-4
9a938eec 17
fb8d23c6 18
9a938eec 19/* key combination for command */
20#define IS_COMMAND() ( \
21 keyboard_report->mods == (BIT_LSHIFT | BIT_RSHIFT) || \
22 keyboard_report->mods == (BIT_LCTRL | BIT_RSHIFT) \
23)
24
4f5f1a53 25
4f5f1a53 26/* mouse keys */
27#ifdef MOUSEKEY_ENABLE
28# define MOUSEKEY_DELAY_TIME 255
29#endif
30
2b8cd88a 31
04f351b8 32/* PS/2 lines */
4f5f1a53 33#define PS2_CLOCK_PORT PORTD
34#define PS2_CLOCK_PIN PIND
35#define PS2_CLOCK_DDR DDRD
47f5d8b5 36#define PS2_CLOCK_BIT 4
4f5f1a53 37#define PS2_DATA_PORT PORTD
38#define PS2_DATA_PIN PIND
39#define PS2_DATA_DDR DDRD
47f5d8b5 40#define PS2_DATA_BIT 0
4f5f1a53 41
47f5d8b5 42
43// Synchronous USART is used to receive data from keyboard.
44// Use RXD pin for PS/2 DATA line and XCK for PS/2 CLOCK.
45// NOTE: This is recomended strongly if you use V-USB library.
46#define PS2_USE_USART
47
48// External or Pin Change Interrupt is used to receive data from keyboard.
49// Use INT1 or PCINTxx for PS/2 CLOCK line. see below.
50//#define PS2_USE_INT
51
52
53#ifdef PS2_USE_USART
54// synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge
55// set DDR of CLOCK as input to be slave
56#define PS2_USART_INIT() do { \
57 PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
58 PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
59 UCSR0C = ((1 << UMSEL00) | \
60 (3 << UPM00) | \
61 (0 << USBS0) | \
62 (3 << UCSZ00) | \
63 (0 << UCPOL0)); \
64 UCSR0A = 0; \
65 UBRR0H = 0; \
66 UBRR0L = 0; \
04f351b8 67} while (0)
47f5d8b5 68#define PS2_USART_RX_INT_ON() do { \
69 UCSR0B = ((1 << RXCIE0) | \
70 (1 << RXEN0)); \
71} while (0)
72#define PS2_USART_RX_POLL_ON() do { \
73 UCSR0B = (1 << RXEN0); \
74} while (0)
75#define PS2_USART_OFF() do { \
76 UCSR0C = 0; \
77 UCSR0B &= ~((1 << RXEN0) | \
78 (1 << TXEN0)); \
79} while (0)
80#define PS2_USART_RX_READY (UCSR0A & (1<<RXC0))
81#define PS2_USART_RX_DATA UDR0
82#define PS2_USART_ERROR (UCSR0A & ((1<<FE0) | (1<<DOR0) | (1<<UPE0)))
83#define PS2_USART_RX_VECT USART_RX_vect
84#endif
2b8cd88a 85
47f5d8b5 86
87#ifdef PS2_USE_INT
88/* INT1
89#define PS2_INT_INIT() do { \
90 EICRA |= ((1<<ISC11) | \
91 (0<<ISC10)); \
92} while (0)
93#define PS2_INT_ON() do { \
94 EIMSK |= (1<<INT1); \
95} while (0)
96#define PS2_INT_OFF() do { \
04f351b8 97 EIMSK &= ~(1<<INT1); \
98} while (0)
99#define PS2_INT_VECT INT1_vect
47f5d8b5 100*/
04f351b8 101
47f5d8b5 102/* PCINT20 */
103#define PS2_INT_INIT() do { \
104 PCICR |= (1<<PCIE2); \
04f351b8 105} while (0)
47f5d8b5 106#define PS2_INT_ON() do { \
107 PCMSK2 |= (1<<PCINT20); \
108} while (0)
109#define PS2_INT_OFF() do { \
110 PCMSK2 &= ~(1<<PCINT20); \
111 PCICR &= ~(1<<PCIE2); \
04f351b8 112} while (0)
113#define PS2_INT_VECT PCINT2_vect
47f5d8b5 114#endif
04f351b8 115
4f5f1a53 116#endif
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