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95001dd6 | 1 | /* |
2 | Copyright 2012 Jun Wako <wakojun@gmail.com> | |
3 | ||
4 | This program is free software: you can redistribute it and/or modify | |
5 | it under the terms of the GNU General Public License as published by | |
6 | the Free Software Foundation, either version 2 of the License, or | |
7 | (at your option) any later version. | |
8 | ||
9 | This program is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | GNU General Public License for more details. | |
13 | ||
14 | You should have received a copy of the GNU General Public License | |
15 | along with this program. If not, see <http://www.gnu.org/licenses/>. | |
16 | */ | |
17 | ||
18 | #ifndef CONFIG_H | |
19 | #define CONFIG_H | |
20 | ||
21 | ||
22 | #define VENDOR_ID 0xFEED | |
23 | #define PRODUCT_ID 0x6535 | |
24 | #define DEVICE_VER 0x0100 | |
25 | #define MANUFACTURER t.m.k. | |
26 | #define PRODUCT PS/2(Set3)-USB Keyboard converter(IBM 122keys) | |
27 | #define DESCRIPTION USB converter for IBM Terminal Keyboard 122keys | |
28 | ||
29 | ||
30 | /* matrix size */ | |
31 | #define MATRIX_ROWS 17 // keycode bit: 3-0 | |
32 | #define MATRIX_COLS 8 // keycode bit: 6-4 | |
33 | ||
34 | ||
35 | /* legacy keymap support */ | |
36 | #define USE_LEGACY_KEYMAP | |
37 | ||
38 | ||
39 | /* key combination for command */ | |
40 | #define IS_COMMAND() ( \ | |
41 | (keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT))) || \ | |
42 | (keyboard_report->mods == (MOD_BIT(KC_RALT) | MOD_BIT(KC_RCTL))) \ | |
43 | ) | |
44 | ||
45 | ||
46 | /* | |
47 | * PS/2 USART configuration for ATMega32U4 | |
48 | */ | |
49 | #ifdef PS2_USE_USART | |
50 | /* XCK for clock line */ | |
51 | #define PS2_CLOCK_PORT PORTD | |
52 | #define PS2_CLOCK_PIN PIND | |
53 | #define PS2_CLOCK_DDR DDRD | |
54 | #define PS2_CLOCK_BIT 5 | |
55 | /* RXD for data line */ | |
56 | #define PS2_DATA_PORT PORTD | |
57 | #define PS2_DATA_PIN PIND | |
58 | #define PS2_DATA_DDR DDRD | |
59 | #define PS2_DATA_BIT 2 | |
60 | ||
61 | /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */ | |
62 | /* set DDR of CLOCK as input to be slave */ | |
63 | #define PS2_USART_INIT() do { \ | |
64 | PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \ | |
65 | PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \ | |
66 | UCSR1C = ((1 << UMSEL10) | \ | |
67 | (3 << UPM10) | \ | |
68 | (0 << USBS1) | \ | |
69 | (3 << UCSZ10) | \ | |
70 | (0 << UCPOL1)); \ | |
71 | UCSR1A = 0; \ | |
72 | UBRR1H = 0; \ | |
73 | UBRR1L = 0; \ | |
74 | } while (0) | |
75 | #define PS2_USART_RX_INT_ON() do { \ | |
76 | UCSR1B = ((1 << RXCIE1) | \ | |
77 | (1 << RXEN1)); \ | |
78 | } while (0) | |
79 | #define PS2_USART_RX_POLL_ON() do { \ | |
80 | UCSR1B = (1 << RXEN1); \ | |
81 | } while (0) | |
82 | #define PS2_USART_OFF() do { \ | |
83 | UCSR1C = 0; \ | |
84 | UCSR1B &= ~((1 << RXEN1) | \ | |
85 | (1 << TXEN1)); \ | |
86 | } while (0) | |
87 | #define PS2_USART_RX_READY (UCSR1A & (1<<RXC1)) | |
88 | #define PS2_USART_RX_DATA UDR1 | |
89 | #define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1))) | |
90 | #define PS2_USART_RX_VECT USART1_RX_vect | |
91 | #endif | |
92 | ||
93 | ||
94 | /* | |
95 | * PS/2 Interrupt configuration | |
96 | */ | |
97 | #ifdef PS2_USE_INT | |
98 | /* uses INT1 for clock line(ATMega32U4) */ | |
99 | #define PS2_CLOCK_PORT PORTD | |
100 | #define PS2_CLOCK_PIN PIND | |
101 | #define PS2_CLOCK_DDR DDRD | |
102 | #define PS2_CLOCK_BIT 1 | |
103 | ||
104 | #define PS2_DATA_PORT PORTD | |
105 | #define PS2_DATA_PIN PIND | |
106 | #define PS2_DATA_DDR DDRD | |
107 | #define PS2_DATA_BIT 0 | |
108 | ||
109 | #define PS2_INT_INIT() do { \ | |
110 | EICRA |= ((1<<ISC11) | \ | |
111 | (0<<ISC10)); \ | |
112 | } while (0) | |
113 | #define PS2_INT_ON() do { \ | |
114 | EIMSK |= (1<<INT1); \ | |
115 | } while (0) | |
116 | #define PS2_INT_OFF() do { \ | |
117 | EIMSK &= ~(1<<INT1); \ | |
118 | } while (0) | |
119 | #define PS2_INT_VECT INT1_vect | |
120 | #endif | |
121 | ||
122 | ||
123 | /* | |
124 | * PS/2 Busywait configuration | |
125 | */ | |
126 | #ifdef PS2_USE_BUSYWAIT | |
127 | #define PS2_CLOCK_PORT PORTD | |
128 | #define PS2_CLOCK_PIN PIND | |
129 | #define PS2_CLOCK_DDR DDRD | |
130 | #define PS2_CLOCK_BIT 1 | |
131 | ||
132 | #define PS2_DATA_PORT PORTD | |
133 | #define PS2_DATA_PIN PIND | |
134 | #define PS2_DATA_DDR DDRD | |
135 | #define PS2_DATA_BIT 0 | |
136 | #endif | |
137 | ||
138 | #endif |