]> git.gir.st - tmk_keyboard.git/blob - keyboard/kl27z_kbd/README.md
Add keyboard/kl27z_kbd
[tmk_keyboard.git] / keyboard / kl27z_kbd / README.md
1 KL27Z128/256 board
2 ==================
3 2016/11/30
4
5 KL27Z is configured to use internal 48MHz RC oscillator.
6
7 The board has push button on PTA4 and LED on PTD7. The button works as 'a' key and the LED as an indicator for capslock.
8
9
10 ELF board
11 ---------
12 This board acommodates 48QFN chip.
13
14 ### prototypte pinout
15 - pcb layout https://deskthority.net/resources/image/33293
16 - schematic https://deskthority.net/resources/image/33252
17
18
19 ```
20 G G
21 N 5 D D N F D D D D D D
22 D V - + D G \ USB / 6 5 4 3 2 1
23 ,--------------------- | Conn | --------------------.
24 |39 40 41 42 43 44 | | 1 2 3 4 5 6 |
25 3.3V|38 |_________| 7 |D0
26 A0|37 RST 8 |C7
27 A3|36 9 |C6
28 +A20|35 10|C5+
29 E20|34 11|C4
30 E21|33 BL 12|C3
31 E29|32 13|C2
32 |31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14|
33 `-------------------------------------------------------'
34 E E E A A A 3 A G A C B B B B B C C
35 3 2 2 1 2 4 . 1 N 1 1 1 2 3 1 1 0 1
36 0 4 5 + + 3V 8 D 9 6 7
37
38
39 1 PTD6 12 PTC3 23 GND 34 PTE20*
40 2 PTD5 13 PTC2 24 PTA18 35 PTA20/Reset+
41 3 PTD4 14 PTC1 25 3.3V 36 PTA3/SWD_DIO
42 4 PTD3* 15 PTC0* 26 PTA4/NMI+ 37 PTA0/SWD_CLK
43 5 PTD2* 16 PTB17* 27 PTA2 38 3.3V
44 6 PTD1* 17 PTB16* 28 PTA1+ 39 GND
45 7 PTD0* 18 PTB3* 29 PTE25* 40 VBUS/VREGIN/5V
46 8 PTC7 19 PTB2* 30 PTE24* 41 USB D-
47 9 PTC6 20 PTB1 31 PTE30 42 USB D+
48 10 PTC5+ 21 PTB0 32 PTE29* 43 GND
49 11 PTC4 22 PTA19 33 PTE21* 44 USB Shield/FB
50 +: Pins with resistor or switch
51 *: Pins which don't exist in QFN32
52 ```
53
54
55 TMK KL27Z breakout
56 ------------------
57 This board acommodates 48QFN chip.
58
59 ### Pinputs
60
61 _\ conn /_
62 1 28
63 : :
64 : PROG :
65 : RST :
66 14 15
67 ----------
68
69 1 VUSB 28 GND
70 2 VIN/VREGIN 27 PTD4
71 3 PTD5 26 PTC7
72 4 PTD6 25 PTC6
73 5 PTD7 24 PTC5+
74 6 PTE0* 23 PTC4
75
76 7 3.3V 22 GND
77 8 PTE30 21 PTC3
78 9 PTA0/SWD_CLK 20 PTC2
79 10 PTA1+ 19 PTC1
80 11 PTA2 18 PTB1
81 12 PTA3/SWD_DIO 17 PTB0
82 13 PTA4/NMI+ 16 PTA20/Reset+
83 14 PTA18 15 PTA19
84 *: Pin which doesn't exist in QFN48
85
86
87 #### Pinouts difference between 32QFN and 48QFN
88 48QFN doesn't have PTE0
89 32QFN doesn't have PTD0-3, PTC0, PTE20-21,24,25,29, PTB2-3,16,17
90
91 ### ROM bootloader pins
92 See Reference Manual Chapter 13.
93
94 PTA2 LPUART0_TX
95 PTA1 LPUART0_RX *
96 PTB0 I2C0_SCL
97 PTB1 I2C0_SDA
98 PTC4 SPI0_SS_b *
99 PTC7 SPI0_MISO
100 PTC6 SPI0_MOSI
101 PTC5 SPI0_SCK *
102
103 Due to errata e9457, need to pull-up `SPI0_SS_b`(or `SPI0_SCK`) to prevent false detection of SPI.
104 The errata doesn't refer UART though, `LPUART0_RX` also requires pull-up or down resisitor from experience.
105 Without resistor it easily false-detects activity on UART interface with finger touch on the pin.
106
107
108
109
110 Resources
111 ---------
112 ### Deskthority thread
113 https://deskthority.net/workshop-f7/can-we-design-the-teensy-alternative-for-keyboards-t13662-510.html
114
115 ### Kinetis KL2x
116 http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/kinetis-cortex-m-mcus/l-series-ultra-low-power-m0-plus/kinetis-kl2x-48-mhz-usb-ultra-low-power-microcontrollers-based-on-arm-cortex-m0-plus:KL2x
117
118 ### KL27Z128/256 Data Sheet
119 http://www.nxp.com/assets/documents/data/en/data-sheets/KL27P64M48SF6.pdf
120
121 ### KL27Z128/256 Reference Manual
122 http://www.nxp.com/assets/documents/data/en/reference-manuals/KL27P64M48SF6RM.pdf
123
124 ### Errata
125 http://www.nxp.com/assets/documents/data/en/errata/KINETIS_L_1N71K.pdf
126
127 >>
128 e9457: Kinetis Flashloader/ ROM Bootloader: The peripheral auto-detect code in
129 bootloader can falsely detect presence of SPI host causing non-responsive
130 bootloader
131 Description: During the active peripheral detection process, the bootloader can interpret spurious data on
132 the SPI peripheral as valid data. The spurious data causes the bootloader to shutdown all
133 peripherals except the “falsely detected" SPI and enter the command phase loop using the
134 SPI. After the bootloader enters the command phase loop using the SPI, the other peripherals
135 are ignored, so the desired peripheral is no longer active.
136 The bootloader will not falsely detect activity on the I2C, UART, or USB interfaces, so only the
137 SPI interface is affected.
138 Workaround: Ensure that there is an external pull-up on the SPI chip-select pin or that the pin is driven high.
139 This will prevent the bootloader from seeing spurious data due to activity on the SPI clock pin.
140
141 ### Kinetis Bootloader and blhost
142 http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/kinetis-cortex-m-mcus/kinetis-symbols-footprints-and-models/kinetis-bootloader:KBOOT
143
144
145 Build
146 -----
147
148 make
149
150
151 Program
152 -------
153 Flash firmware with ROM bootloader.
154
155 blhost -u -- flash-image build/kl27z.hex erase
156
157
158 TODO
159 ----
160 - Fix boards/ELF files
161 - add macro `USBx_CTL_RESUME` to ChibiOS-Contrib/os/common/ext/CMSIS/KINETIS/kl27zxxx.h
Imprint / Impressum