keyboard/infinity/tool/k20dx32_flash.cfg

   1 # FreeScale Kinetis K20 devices with 32kB Flash and 8kB Local On-Chip SRAM,
   2 # Nemuisan's Special for MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5
   3
   4
   5 # 0.8.0 has no these procs
   6 proc using_jtag {} {
   7         set _TRANSPORT [ transport select ]
   8         expr { [ string first "jtag" $_TRANSPORT ] != -1 }
   9 }
  10
  11 proc using_swd {} {
  12         set _TRANSPORT [ transport select ]
  13         expr { [ string first "swd" $_TRANSPORT ] != -1 }
  14 }
  15
  16 proc using_hla {} {
  17         set _TRANSPORT [ transport select ]
  18         expr { [ string first "hla" $_TRANSPORT ] != -1 }
  19 }
  20
  21 source [find target/swj-dp.tcl]
  22
  23 if { [info exists CHIPNAME] } {
  24     set _CHIPNAME $CHIPNAME
  25 } else {
  26     set _CHIPNAME k20
  27 }
  28
  29 if { [info exists ENDIAN] } {
  30     set _ENDIAN $ENDIAN
  31 } else {
  32     set _ENDIAN little
  33 }
  34
  35 if { [info exists CPUTAPID] } {
  36    set _CPUTAPID $CPUTAPID
  37 } else {
  38    if { [using_jtag] } {
  39       set _CPUTAPID 0x4BA00477
  40    } {
  41       # this is the SW-DP tap id not the jtag tap id
  42       set _CPUTAPID 0x2BA01477
  43    }
  44 }
  45
  46 # Work-area is a space in RAM used for flash programming
  47 # By default use 8kB
  48 if { [info exists WORKAREASIZE] == 0 } {
  49    set _WORKAREASIZE 0x2000
  50 }
  51
  52 # Select "srst_only", Nemuisan said so!
  53 echo "Kinetis MUST need Hardware SRST Control to Recover Secure-State!"
  54 adapter_nsrst_delay 200
  55 reset_config srst_only
  56
  57 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
  58 set _TARGETNAME $_CHIPNAME.cpu
  59 target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
  60
  61 # It is important that "kinetis mdm check_security" is called for
  62 # 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
  63 # causes "kinetis mdm check_security" to fail the first time openocd
  64 # calls it when it tries to connect after the CPU has been power-cycled.
  65 $_CHIPNAME.cpu configure -event examine-end {
  66         kinetis mdm check_security
  67 # Uncomment when gone into s*ck'n secured state!
  68 #       kinetis mdm mass_erase
  69 }
  70
  71 # K20 has minimun 8kB of SRAM and starts at 1FFFF000.
  72 $_TARGETNAME configure -work-area-phys 0x1FFFF000 -work-area-size $_WORKAREASIZE -work-area-backup 0 -rtos auto
  73
  74 # MK20DN32VFT5,MK20DX32VFT5,MK10DN32VFT5,MK10DX32VFT5 has 32kB of flash memory.
  75 flash bank $_CHIPNAME.pflash kinetis 0x00000000 0x8000 0 4 $_TARGETNAME
  76
  77
  78 proc mt_flash {IMGFILE} {
  79         flash write_image erase $IMGFILE
  80         reset run
  81         halt
  82         verify_image $IMGFILE
  83         reset run
  84         shutdown
  85 }
  86
  87 proc mt_flash_bin {IMGFILE OFFSET} {
  88         flash write_image erase $IMGFILE $OFFSET bin
  89         reset run
  90         halt
  91         verify_image $IMGFILE $OFFSET bin
  92         reset run
  93         shutdown
  94 }
  95
  96 proc mt_flash_hex {IMGFILE} {
  97         flash write_image erase $IMGFILE 0 ihex
  98         reset run
  99         halt
 100         verify_image $IMGFILE 0 ihex
 101         reset run
 102         shutdown
 103 }
 104
 105 proc mt_flash_srec {IMGFILE} {
 106         flash write_image erase $IMGFILE 0 s19
 107         reset run
 108         halt
 109         verify_image $IMGFILE 0 s19
 110         reset run
 111         shutdown
 112 }
 113
 114 proc mass_erase {} {
 115         kinetis mdm mass_erase
 116 }
 117
 118 proc eraser {} {
 119 # Verbose procedure confirmed erase routine
 120         flash info 0
 121 # CAUTION! "flash erase_sector 0 0 last" goes into secure state!!!
 122 # USE "mass_erase" command instead of
 123 #       flash erase_sector 0 0 last
 124         mass_erase
 125         shutdown
 126 }
 127
 128 #debug_level 3
 129 # HLA doesn't have cortex_m commands
 130 if {![using_hla]} {
 131    # if srst is not fitted use SYSRESETREQ to
 132    # perform a soft reset
 133    cortex_m reset_config sysresetreq
 134 }
 135 adapter_khz 1000
 136 reset_config srst_only srst_nogate connect_assert_srst
 137 gdb_target_description disable
 138 init
 139 reset init