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1 /*
2 Copyright 2012 Jun Wako <wakojun@gmail.com>
3
4 This program is free software: you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation, either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #ifndef CONFIG_H
19 #define CONFIG_H
20
21 /* controller configuration */
22 #include "controller_teensy.h"
23
24 #define VENDOR_ID 0xFEED
25 #define PRODUCT_ID 0x6513
26 #define MANUFACTURER t.m.k.
27 #define PRODUCT PS/2 keyboard converter(USART)
28 #define DESCRIPTION convert PS/2 keyboard to USB
29
30
31 /* matrix size */
32 #define MATRIX_ROWS 32 // keycode bit: 3-0
33 #define MATRIX_COLS 8 // keycode bit: 6-4
34
35
36 /* key combination for command */
37 #define IS_COMMAND() ( \
38 keyboard_report->mods == (MOD_BIT(KB_LSHIFT) | MOD_BIT(KB_RSHIFT)) || \
39 keyboard_report->mods == (MOD_BIT(KB_LCTRL) | MOD_BIT(KB_RSHIFT)) \
40 )
41
42
43 /* mouse keys */
44 #ifdef MOUSEKEY_ENABLE
45 # define MOUSEKEY_DELAY_TIME 255
46 #endif
47
48
49 /* PS/2 lines */
50 #define PS2_CLOCK_PORT PORTD
51 #define PS2_CLOCK_PIN PIND
52 #define PS2_CLOCK_DDR DDRD
53 #define PS2_CLOCK_BIT 5
54 #define PS2_DATA_PORT PORTD
55 #define PS2_DATA_PIN PIND
56 #define PS2_DATA_DDR DDRD
57 #define PS2_DATA_BIT 2
58
59
60 // synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge
61 // set DDR of CLOCK as input to be slave
62 #define PS2_USART_INIT() do { \
63 PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
64 PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
65 UCSR1C = ((1 << UMSEL10) | \
66 (3 << UPM10) | \
67 (0 << USBS1) | \
68 (3 << UCSZ10) | \
69 (0 << UCPOL1)); \
70 UCSR1A = 0; \
71 UBRR1H = 0; \
72 UBRR1L = 0; \
73 } while (0)
74 #define PS2_USART_RX_INT_ON() do { \
75 UCSR1B = ((1 << RXCIE1) | \
76 (1 << RXEN1)); \
77 } while (0)
78 #define PS2_USART_RX_POLL_ON() do { \
79 UCSR1B = (1 << RXEN1); \
80 } while (0)
81 #define PS2_USART_OFF() do { \
82 UCSR1C = 0; \
83 UCSR1B &= ~((1 << RXEN1) | \
84 (1 << TXEN1)); \
85 } while (0)
86 #define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
87 #define PS2_USART_RX_DATA UDR1
88 #define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
89 #define PS2_USART_RX_VECT USART1_RX_vect
90
91 #endif
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