tmk_core/tool/mbed/mbed-sdk/libraries/USBDevice/USBDevice/USBHAL_Maxim.cpp

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  32  */
  33
  34 #if defined(TARGET_Maxim)
  35
  36 #include "USBHAL.h"
  37 #include "usb_regs.h"
  38 #include "clkman_regs.h"
  39
  40 #define CONNECT_INTS    (MXC_F_USB_DEV_INTEN_BRST | MXC_F_USB_DEV_INTEN_SETUP | MXC_F_USB_DEV_INTEN_EP_IN | MXC_F_USB_DEV_INTEN_EP_OUT | MXC_F_USB_DEV_INTEN_DMA_ERR)
  41
  42 USBHAL *USBHAL::instance;
  43
  44 typedef struct {
  45     volatile uint32_t buf0_desc;
  46     volatile uint32_t buf0_address;
  47     volatile uint32_t buf1_desc;
  48     volatile uint32_t buf1_address;
  49 } ep_buffer_t;
  50
  51 typedef struct {
  52     ep_buffer_t out_buffer;
  53     ep_buffer_t in_buffer;
  54 } ep0_buffer_t;
  55
  56 typedef struct {
  57     ep0_buffer_t ep0;
  58     ep_buffer_t ep[MXC_USB_NUM_EP - 1];
  59 } ep_buffer_descriptor_t;
  60
  61 // Static storage for endpoint buffer descriptor table. Must be 512 byte alligned for DMA.
  62 #ifdef __IAR_SYSTEMS_ICC__
  63 #pragma data_alignment = 512
  64 #else
  65 __attribute__ ((aligned (512)))
  66 #endif
  67 ep_buffer_descriptor_t ep_buffer_descriptor;
  68
  69 // static storage for temporary data buffers. Must be 32 byte alligned.
  70 #ifdef __IAR_SYSTEMS_ICC__
  71 #pragma data_alignment = 4
  72 #else
  73 __attribute__ ((aligned (4)))
  74 #endif
  75 static uint8_t aligned_buffer[NUMBER_OF_LOGICAL_ENDPOINTS][MXC_USB_MAX_PACKET];
  76
  77 // contorl packet state
  78 static enum {
  79     CTRL_NONE = 0,
  80     CTRL_SETUP,
  81     CTRL_OUT,
  82     CTRL_IN,
  83 } control_state;
  84
  85 USBHAL::USBHAL(void)
  86 {
  87     NVIC_DisableIRQ(USB_IRQn);
  88
  89     // The PLL must be enabled for USB
  90     MBED_ASSERT(MXC_CLKMAN->clk_config & MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE);
  91
  92     // Enable the USB clock
  93     MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N;
  94
  95     // reset the device
  96     MXC_USB->cn = 0;
  97     MXC_USB->cn = 1;
  98     MXC_USB->dev_inten = 0;
  99     MXC_USB->dev_cn = 0;
 100     MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
 101     MXC_USB->dev_cn = 0;
 102
 103     // fill in callback arrays
 104     epCallback[EP0OUT] = NULL;
 105     epCallback[EP0IN]  = NULL;
 106     epCallback[EP1OUT] = &USBHAL::EP1_OUT_callback;
 107     epCallback[EP1IN ] = &USBHAL::EP1_IN_callback;
 108     epCallback[EP2OUT] = &USBHAL::EP2_OUT_callback;
 109     epCallback[EP2IN ] = &USBHAL::EP2_IN_callback;
 110     epCallback[EP3OUT] = &USBHAL::EP3_OUT_callback;
 111     epCallback[EP3IN ] = &USBHAL::EP3_IN_callback;
 112     epCallback[EP4OUT] = &USBHAL::EP4_OUT_callback;
 113     epCallback[EP4IN ] = &USBHAL::EP4_IN_callback;
 114     epCallback[EP5OUT] = &USBHAL::EP5_OUT_callback;
 115     epCallback[EP5IN ] = &USBHAL::EP5_IN_callback;
 116     epCallback[EP6OUT] = &USBHAL::EP6_OUT_callback;
 117     epCallback[EP6IN ] = &USBHAL::EP6_IN_callback;
 118     epCallback[EP7OUT] = &USBHAL::EP7_OUT_callback;
 119     epCallback[EP7IN ] = &USBHAL::EP7_IN_callback;
 120
 121     // clear driver state
 122     control_state = CTRL_NONE;
 123
 124     // set the descriptor location
 125     MXC_USB->ep_base = (uint32_t)&ep_buffer_descriptor;
 126
 127     // attach IRQ handler and enable interrupts
 128     instance = this;
 129     NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
 130     NVIC_EnableIRQ(USB_IRQn);
 131 }
 132
 133 USBHAL::~USBHAL(void)
 134 {
 135     MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
 136     MXC_USB->dev_cn = 0;
 137     MXC_USB->cn = 0;
 138 }
 139
 140 void USBHAL::connect(void)
 141 {
 142     // enable interrupts
 143     MXC_USB->dev_inten |= CONNECT_INTS;
 144
 145     // allow interrupts on ep0
 146     MXC_USB->ep[0] |= MXC_F_USB_EP_INT_EN;
 147
 148     // pullup enable
 149     MXC_USB->dev_cn |= (MXC_F_USB_DEV_CN_CONNECT | MXC_F_USB_DEV_CN_FIFO_MODE);
 150 }
 151
 152 void USBHAL::disconnect(void)
 153 {
 154     // disable interrupts
 155     MXC_USB->dev_inten &= ~CONNECT_INTS;
 156
 157     // disable pullup
 158     MXC_USB->dev_cn &= ~MXC_F_USB_DEV_CN_CONNECT;
 159 }
 160
 161 void USBHAL::configureDevice(void)
 162 {
 163     // do nothing
 164 }
 165
 166 void USBHAL::unconfigureDevice(void)
 167 {
 168     // reset endpoints
 169     for (int i = 0; i < MXC_USB_NUM_EP; i++) {
 170         // Disable endpoint and clear the data toggle
 171         MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
 172         MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
 173     }
 174 }
 175
 176 void USBHAL::setAddress(uint8_t address)
 177 {
 178     // do nothing
 179 }
 180
 181 void USBHAL::remoteWakeup(void)
 182 {
 183     // do nothing
 184 }
 185
 186 static ep_buffer_t *get_desc(uint8_t endpoint)
 187 {
 188     uint8_t epnum = EP_NUM(endpoint);
 189     ep_buffer_t *desc;
 190
 191     if (epnum == 0) {
 192         if (IN_EP(endpoint)) {
 193             desc = &ep_buffer_descriptor.ep0.in_buffer;
 194         } else {
 195             desc = &ep_buffer_descriptor.ep0.out_buffer;
 196         }
 197     } else {
 198         desc = &ep_buffer_descriptor.ep[epnum - 1];
 199     }
 200
 201     return desc;
 202 }
 203
 204 void USBHAL::EP0setup(uint8_t *buffer)
 205 {
 206     memcpy(buffer, (void*)&MXC_USB->setup0, 8); // setup packet is fixed at 8 bytes
 207 }
 208
 209 void USBHAL::EP0read(void)
 210 {
 211     if (control_state == CTRL_IN) {
 212         // This is the status stage. ACK.
 213         MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
 214         control_state = CTRL_NONE;
 215         return;
 216     }
 217
 218     control_state = CTRL_OUT;
 219
 220     endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
 221 }
 222
 223 void USBHAL::EP0readStage(void)
 224 {
 225     // do nothing
 226 }
 227
 228 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer)
 229 {
 230     uint32_t size;
 231
 232     if (MXC_USB->out_owner & 1) {
 233         return 0;
 234     }
 235
 236     // get the packet length and contents
 237     ep_buffer_t *desc = get_desc(EP0OUT);
 238     size = desc->buf0_desc;
 239     memcpy(buffer, aligned_buffer[0], size);
 240
 241     return size;
 242 }
 243
 244 void USBHAL::EP0write(uint8_t *buffer, uint32_t size)
 245 {
 246     if ((size == 0) && (control_state != CTRL_IN)) {
 247         // This is a status stage ACK. Handle in hardware.
 248         MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
 249         control_state = CTRL_NONE;
 250         return;
 251     }
 252
 253     control_state = CTRL_IN;
 254
 255     endpointWrite(EP0IN, buffer, size);
 256 }
 257
 258 void USBHAL::EP0stall(void)
 259 {
 260     stallEndpoint(0);
 261 }
 262
 263 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize)
 264 {
 265     uint8_t epnum = EP_NUM(endpoint);
 266
 267     if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
 268         return EP_INVALID;
 269     }
 270
 271     if (maximumSize > MXC_USB_MAX_PACKET) {
 272         return EP_INVALID;
 273     }
 274
 275     uint32_t mask = (1 << epnum);
 276     if (MXC_USB->out_owner & mask) {
 277         return EP_INVALID;
 278     }
 279
 280     ep_buffer_t *desc = get_desc(endpoint);
 281     desc->buf0_desc = maximumSize;
 282     desc->buf0_address = (uint32_t)aligned_buffer[epnum];
 283
 284     MXC_USB->out_owner = mask;
 285
 286     return EP_PENDING;
 287 }
 288
 289 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *data, uint32_t *bytesRead)
 290 {
 291     if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
 292         return EP_INVALID;
 293     }
 294
 295     uint32_t mask = (1 << EP_NUM(endpoint));
 296     if (MXC_USB->out_owner & mask) {
 297         return EP_PENDING;
 298     }
 299
 300     // get the packet length and contents
 301     ep_buffer_t *desc = get_desc(endpoint);
 302     *bytesRead = desc->buf0_desc;
 303     memcpy(data, aligned_buffer[EP_NUM(endpoint)], *bytesRead);
 304
 305     return EP_COMPLETED;
 306 }
 307
 308 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
 309 {
 310     uint8_t epnum = EP_NUM(endpoint);
 311
 312     if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || OUT_EP(endpoint)) {
 313         return EP_INVALID;
 314     }
 315
 316     if (size > MXC_USB_MAX_PACKET) {
 317         return EP_INVALID;
 318     }
 319
 320     uint32_t mask = (1 << epnum);
 321     if (MXC_USB->in_owner & mask) {
 322         return EP_INVALID;
 323     }
 324
 325     memcpy(aligned_buffer[epnum], data, size);
 326
 327     ep_buffer_t *desc = get_desc(endpoint);
 328     desc->buf0_desc = size;
 329     desc->buf0_address = (uint32_t)aligned_buffer[epnum];
 330
 331     // start the DMA
 332     MXC_USB->in_owner = mask;
 333
 334     return EP_PENDING;
 335 }
 336
 337 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint)
 338 {
 339     uint32_t mask = (1 << EP_NUM(endpoint));
 340     if (MXC_USB->in_owner & mask) {
 341         return EP_PENDING;
 342     }
 343
 344     return EP_COMPLETED;
 345 }
 346
 347 void USBHAL::stallEndpoint(uint8_t endpoint)
 348 {
 349     uint8_t epnum = EP_NUM(endpoint);
 350
 351     if (epnum == 0) {
 352         MXC_USB->ep[epnum] |= MXC_F_USB_EP_ST_STALL;
 353     }
 354
 355     MXC_USB->ep[epnum] |= MXC_F_USB_EP_STALL;
 356 }
 357
 358 void USBHAL::unstallEndpoint(uint8_t endpoint)
 359 {
 360     MXC_USB->ep[EP_NUM(endpoint)] &= ~MXC_F_USB_EP_STALL;
 361 }
 362
 363 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t options)
 364 {
 365     uint8_t epnum = EP_NUM(endpoint);
 366     uint32_t ep_ctrl;
 367
 368     if (epnum >= NUMBER_OF_PHYSICAL_ENDPOINTS) {
 369         return false;
 370     }
 371
 372     if (IN_EP(endpoint)) {
 373         ep_ctrl = (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS);
 374     } else {
 375         ep_ctrl = (MXC_S_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS);
 376     }
 377
 378     ep_ctrl |= (MXC_F_USB_EP_DT | MXC_F_USB_EP_INT_EN);
 379
 380     MXC_USB->ep[epnum] = ep_ctrl;
 381
 382     return true;
 383 }
 384
 385 bool USBHAL::getEndpointStallState(unsigned char endpoint)
 386 {
 387     return !!(MXC_USB->ep[endpoint] & MXC_F_USB_EP_STALL);
 388 }
 389
 390 void USBHAL::_usbisr(void)
 391 {
 392     instance->usbisr();
 393 }
 394
 395 void USBHAL::usbisr(void)
 396 {
 397     // get and clear irqs
 398     uint32_t irq_flags = MXC_USB->dev_intfl;
 399     MXC_USB->dev_intfl = irq_flags;
 400
 401     // process only enabled interrupts
 402     irq_flags &= MXC_USB->dev_inten;
 403
 404     // suspend
 405     if (irq_flags & MXC_F_USB_DEV_INTFL_SUSP) {
 406         suspendStateChanged(1);
 407     }
 408
 409     // bus reset
 410     if (irq_flags & MXC_F_USB_DEV_INTFL_BRST) {
 411
 412         // reset endpoints
 413         for (int i = 0; i < MXC_USB_NUM_EP; i++) {
 414             // Disable endpoint and clear the data toggle
 415             MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
 416             MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
 417         }
 418
 419         // clear driver state
 420         control_state = CTRL_NONE;
 421
 422         busReset();
 423
 424         // no need to process events after reset
 425         return;
 426     }
 427
 428     // Setup packet
 429     if (irq_flags & MXC_F_USB_DEV_INTFL_SETUP) {
 430         control_state = CTRL_SETUP;
 431         EP0setupCallback();
 432     }
 433
 434     // IN packets
 435     if (irq_flags & MXC_F_USB_DEV_INTFL_EP_IN) {
 436         // get and clear IN irqs
 437         uint32_t in_irqs = MXC_USB->in_int;
 438         MXC_USB->in_int = in_irqs;
 439
 440         if (in_irqs & 1) {
 441             EP0in();
 442         }
 443
 444         for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
 445             uint32_t irq_mask = (1 << epnum);
 446             if (in_irqs & irq_mask) {
 447                 uint8_t endpoint = (epnum << 1) | DIR_IN;
 448                 (instance->*(epCallback[endpoint]))();
 449             }
 450         }
 451     }
 452
 453     // OUT packets
 454     if (irq_flags & MXC_F_USB_DEV_INTFL_EP_OUT) {
 455         // get and clear OUT irqs
 456         uint32_t out_irqs = MXC_USB->out_int;
 457         MXC_USB->out_int = out_irqs;
 458
 459         if (out_irqs & 1) {
 460             EP0out();
 461         }
 462
 463         for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
 464             uint32_t irq_mask = (1 << epnum);
 465             if (out_irqs & irq_mask) {
 466                 uint8_t endpoint = (epnum << 1) | DIR_OUT;
 467                 (instance->*(epCallback[endpoint]))();
 468             }
 469         }
 470     }
 471 }
 472
 473 #endif