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1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 *
4 * $Date: 17. January 2013
5 * $Revision: V1.4.1
6 *
7 * Project: CMSIS DSP Library
8 * Title: arm_negate_q31.c
9 *
10 * Description: Negates Q31 vectors.
11 *
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 * -------------------------------------------------------------------- */
40
41 #include "arm_math.h"
42
43 /**
44 * @ingroup groupMath
45 */
46
47 /**
48 * @addtogroup negate
49 * @{
50 */
51
52 /**
53 * @brief Negates the elements of a Q31 vector.
54 * @param[in] *pSrc points to the input vector
55 * @param[out] *pDst points to the output vector
56 * @param[in] blockSize number of samples in the vector
57 * @return none.
58 *
59 * <b>Scaling and Overflow Behavior:</b>
60 * \par
61 * The function uses saturating arithmetic.
62 * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
63 */
64
65 void arm_negate_q31(
66 q31_t * pSrc,
67 q31_t * pDst,
68 uint32_t blockSize)
69 {
70 q31_t in; /* Temporary variable */
71 uint32_t blkCnt; /* loop counter */
72
73 #ifndef ARM_MATH_CM0_FAMILY
74
75 /* Run the below code for Cortex-M4 and Cortex-M3 */
76 q31_t in1, in2, in3, in4;
77
78 /*loop Unrolling */
79 blkCnt = blockSize >> 2u;
80
81 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
82 ** a second loop below computes the remaining 1 to 3 samples. */
83 while(blkCnt > 0u)
84 {
85 /* C = -A */
86 /* Negate and then store the results in the destination buffer. */
87 in1 = *pSrc++;
88 in2 = *pSrc++;
89 in3 = *pSrc++;
90 in4 = *pSrc++;
91
92 *pDst++ = __QSUB(0, in1);
93 *pDst++ = __QSUB(0, in2);
94 *pDst++ = __QSUB(0, in3);
95 *pDst++ = __QSUB(0, in4);
96
97 /* Decrement the loop counter */
98 blkCnt--;
99 }
100
101 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
102 ** No loop unrolling is used. */
103 blkCnt = blockSize % 0x4u;
104
105 #else
106
107 /* Run the below code for Cortex-M0 */
108
109 /* Initialize blkCnt with number of samples */
110 blkCnt = blockSize;
111
112 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
113
114
115 while(blkCnt > 0u)
116 {
117 /* C = -A */
118 /* Negate and then store the result in the destination buffer. */
119 in = *pSrc++;
120 *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
121
122 /* Decrement the loop counter */
123 blkCnt--;
124 }
125 }
126
127 /**
128 * @} end of negate group
129 */
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