tmk_core/tool/mbed/mbed-sdk/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q15.c

   1 /* ----------------------------------------------------------------------
   2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
   3 *
   4 * $Date:        17. January 2013
   5 * $Revision:    V1.4.1
   6 *
   7 * Project:          CMSIS DSP Library
   8 * Title:                arm_scale_q15.c
   9 *
  10 * Description:  Multiplies a Q15 vector by a scalar.
  11 *
  12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13 *
  14 * Redistribution and use in source and binary forms, with or without
  15 * modification, are permitted provided that the following conditions
  16 * are met:
  17 *   - Redistributions of source code must retain the above copyright
  18 *     notice, this list of conditions and the following disclaimer.
  19 *   - Redistributions in binary form must reproduce the above copyright
  20 *     notice, this list of conditions and the following disclaimer in
  21 *     the documentation and/or other materials provided with the
  22 *     distribution.
  23 *   - Neither the name of ARM LIMITED nor the names of its contributors
  24 *     may be used to endorse or promote products derived from this
  25 *     software without specific prior written permission.
  26 *
  27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38 * POSSIBILITY OF SUCH DAMAGE.
  39 * -------------------------------------------------------------------- */
  40
  41 #include "arm_math.h"
  42
  43 /**
  44  * @ingroup groupMath
  45  */
  46
  47 /**
  48  * @addtogroup scale
  49  * @{
  50  */
  51
  52 /**
  53  * @brief Multiplies a Q15 vector by a scalar.
  54  * @param[in]       *pSrc points to the input vector
  55  * @param[in]       scaleFract fractional portion of the scale value
  56  * @param[in]       shift number of bits to shift the result by
  57  * @param[out]      *pDst points to the output vector
  58  * @param[in]       blockSize number of samples in the vector
  59  * @return none.
  60  *
  61  * <b>Scaling and Overflow Behavior:</b>
  62  * \par
  63  * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
  64  * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
  65  */
  66
  67
  68 void arm_scale_q15(
  69   q15_t * pSrc,
  70   q15_t scaleFract,
  71   int8_t shift,
  72   q15_t * pDst,
  73   uint32_t blockSize)
  74 {
  75   int8_t kShift = 15 - shift;                    /* shift to apply after scaling */
  76   uint32_t blkCnt;                               /* loop counter */
  77
  78 #ifndef ARM_MATH_CM0_FAMILY
  79
  80 /* Run the below code for Cortex-M4 and Cortex-M3 */
  81   q15_t in1, in2, in3, in4;
  82   q31_t inA1, inA2;                              /* Temporary variables */
  83   q31_t out1, out2, out3, out4;
  84
  85
  86   /*loop Unrolling */
  87   blkCnt = blockSize >> 2u;
  88
  89   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
  90    ** a second loop below computes the remaining 1 to 3 samples. */
  91   while(blkCnt > 0u)
  92   {
  93     /* Reading 2 inputs from memory */
  94     inA1 = *__SIMD32(pSrc)++;
  95     inA2 = *__SIMD32(pSrc)++;
  96
  97     /* C = A * scale */
  98     /* Scale the inputs and then store the 2 results in the destination buffer
  99      * in single cycle by packing the outputs */
 100     out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
 101     out2 = (q31_t) ((q15_t) inA1 * scaleFract);
 102     out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
 103     out4 = (q31_t) ((q15_t) inA2 * scaleFract);
 104
 105     /* apply shifting */
 106     out1 = out1 >> kShift;
 107     out2 = out2 >> kShift;
 108     out3 = out3 >> kShift;
 109     out4 = out4 >> kShift;
 110
 111     /* saturate the output */
 112     in1 = (q15_t) (__SSAT(out1, 16));
 113     in2 = (q15_t) (__SSAT(out2, 16));
 114     in3 = (q15_t) (__SSAT(out3, 16));
 115     in4 = (q15_t) (__SSAT(out4, 16));
 116
 117     /* store the result to destination */
 118     *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
 119     *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16);
 120
 121     /* Decrement the loop counter */
 122     blkCnt--;
 123   }
 124
 125   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
 126    ** No loop unrolling is used. */
 127   blkCnt = blockSize % 0x4u;
 128
 129   while(blkCnt > 0u)
 130   {
 131     /* C = A * scale */
 132     /* Scale the input and then store the result in the destination buffer. */
 133     *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
 134
 135     /* Decrement the loop counter */
 136     blkCnt--;
 137   }
 138
 139 #else
 140
 141   /* Run the below code for Cortex-M0 */
 142
 143   /* Initialize blkCnt with number of samples */
 144   blkCnt = blockSize;
 145
 146   while(blkCnt > 0u)
 147   {
 148     /* C = A * scale */
 149     /* Scale the input and then store the result in the destination buffer. */
 150     *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
 151
 152     /* Decrement the loop counter */
 153     blkCnt--;
 154   }
 155
 156 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
 157
 158 }
 159
 160 /**
 161  * @} end of scale group
 162  */