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1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 *
4 * $Date: 17. January 2013
5 * $Revision: V1.4.1
6 *
7 * Project: CMSIS DSP Library
8 * Title: arm_biquad_cascade_df1_32x64_init_q31.c
9 *
10 * Description: High precision Q31 Biquad cascade filter initialization function.
11 *
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 * -------------------------------------------------------------------- */
40
41 #include "arm_math.h"
42
43 /**
44 * @ingroup groupFilters
45 */
46
47 /**
48 * @addtogroup BiquadCascadeDF1_32x64
49 * @{
50 */
51
52 /**
53 * @details
54 *
55 * @param[in,out] *S points to an instance of the high precision Q31 Biquad cascade filter structure.
56 * @param[in] numStages number of 2nd order stages in the filter.
57 * @param[in] *pCoeffs points to the filter coefficients.
58 * @param[in] *pState points to the state buffer.
59 * @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format.
60 * @return none
61 *
62 * <b>Coefficient and State Ordering:</b>
63 *
64 * \par
65 * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
66 * <pre>
67 * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
68 * </pre>
69 * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
70 * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
71 * and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
72 *
73 * \par
74 * The <code>pState</code> points to state variables array and size of each state variable is 1.63 format.
75 * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
76 * The state variables are arranged in the state array as:
77 * <pre>
78 * {x[n-1], x[n-2], y[n-1], y[n-2]}
79 * </pre>
80 * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
81 * The state array has a total length of <code>4*numStages</code> values.
82 * The state variables are updated after each block of data is processed; the coefficients are untouched.
83 */
84
85 void arm_biquad_cas_df1_32x64_init_q31(
86 arm_biquad_cas_df1_32x64_ins_q31 * S,
87 uint8_t numStages,
88 q31_t * pCoeffs,
89 q63_t * pState,
90 uint8_t postShift)
91 {
92 /* Assign filter stages */
93 S->numStages = numStages;
94
95 /* Assign postShift to be applied to the output */
96 S->postShift = postShift;
97
98 /* Assign coefficient pointer */
99 S->pCoeffs = pCoeffs;
100
101 /* Clear state buffer and size is always 4 * numStages */
102 memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q63_t));
103
104 /* Assign state pointer */
105 S->pState = pState;
106 }
107
108 /**
109 * @} end of BiquadCascadeDF1_32x64 group
110 */
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