tmk_core/tool/mbed/mbed-sdk/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_q31.c

   1 /* ----------------------------------------------------------------------
   2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
   3 *
   4 * $Date:        17. January 2013
   5 * $Revision:    V1.4.1
   6 *
   7 * Project:          CMSIS DSP Library
   8 * Title:                arm_rms_q31.c
   9 *
  10 * Description:  Root Mean Square of the elements of a Q31 vector.
  11 *
  12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13 *
  14 * Redistribution and use in source and binary forms, with or without
  15 * modification, are permitted provided that the following conditions
  16 * are met:
  17 *   - Redistributions of source code must retain the above copyright
  18 *     notice, this list of conditions and the following disclaimer.
  19 *   - Redistributions in binary form must reproduce the above copyright
  20 *     notice, this list of conditions and the following disclaimer in
  21 *     the documentation and/or other materials provided with the
  22 *     distribution.
  23 *   - Neither the name of ARM LIMITED nor the names of its contributors
  24 *     may be used to endorse or promote products derived from this
  25 *     software without specific prior written permission.
  26 *
  27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38 * POSSIBILITY OF SUCH DAMAGE.
  39 * ---------------------------------------------------------------------------- */
  40
  41 #include "arm_math.h"
  42
  43 /**
  44  * @addtogroup RMS
  45  * @{
  46  */
  47
  48
  49 /**
  50  * @brief Root Mean Square of the elements of a Q31 vector.
  51  * @param[in]       *pSrc points to the input vector
  52  * @param[in]       blockSize length of the input vector
  53  * @param[out]      *pResult rms value returned here
  54  * @return none.
  55  *
  56  * @details
  57  * <b>Scaling and Overflow Behavior:</b>
  58  *
  59  *\par
  60  * The function is implemented using an internal 64-bit accumulator.
  61  * The input is represented in 1.31 format, and intermediate multiplication
  62  * yields a 2.62 format.
  63  * The accumulator maintains full precision of the intermediate multiplication results,
  64  * but provides only a single guard bit.
  65  * There is no saturation on intermediate additions.
  66  * If the accumulator overflows, it wraps around and distorts the result.
  67  * In order to avoid overflows completely, the input signal must be scaled down by
  68  * log2(blockSize) bits, as a total of blockSize additions are performed internally.
  69  * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
  70  *
  71  */
  72
  73 void arm_rms_q31(
  74   q31_t * pSrc,
  75   uint32_t blockSize,
  76   q31_t * pResult)
  77 {
  78   q63_t sum = 0;                                 /* accumulator */
  79   q31_t in;                                      /* Temporary variable to store the input */
  80   uint32_t blkCnt;                               /* loop counter */
  81
  82 #ifndef ARM_MATH_CM0_FAMILY
  83
  84   /* Run the below code for Cortex-M4 and Cortex-M3 */
  85
  86   q31_t in1, in2, in3, in4;                      /* Temporary input variables */
  87
  88   /*loop Unrolling */
  89   blkCnt = blockSize >> 2u;
  90
  91   /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.
  92    ** a second loop below computes the remaining 1 to 7 samples. */
  93   while(blkCnt > 0u)
  94   {
  95     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
  96     /* Compute sum of the squares and then store the result in a temporary variable, sum */
  97     /* read two samples from source buffer */
  98     in1 = pSrc[0];
  99     in2 = pSrc[1];
 100
 101     /* calculate power and accumulate to accumulator */
 102     sum += (q63_t) in1 *in1;
 103     sum += (q63_t) in2 *in2;
 104
 105     /* read two samples from source buffer */
 106     in3 = pSrc[2];
 107     in4 = pSrc[3];
 108
 109     /* calculate power and accumulate to accumulator */
 110     sum += (q63_t) in3 *in3;
 111     sum += (q63_t) in4 *in4;
 112
 113
 114     /* update source buffer to process next samples */
 115     pSrc += 4u;
 116
 117     /* Decrement the loop counter */
 118     blkCnt--;
 119   }
 120
 121   /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
 122    ** No loop unrolling is used. */
 123   blkCnt = blockSize % 0x4u;
 124
 125 #else
 126
 127   /* Run the below code for Cortex-M0 */
 128   blkCnt = blockSize;
 129
 130 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
 131
 132   while(blkCnt > 0u)
 133   {
 134     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
 135     /* Compute sum of the squares and then store the results in a temporary variable, sum */
 136     in = *pSrc++;
 137     sum += (q63_t) in *in;
 138
 139     /* Decrement the loop counter */
 140     blkCnt--;
 141   }
 142
 143   /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
 144
 145   sum = __SSAT(sum >> 31, 31);
 146
 147
 148   /* Compute Rms and store the result in the destination vector */
 149   arm_sqrt_q31((q31_t) ((q31_t) sum / (int32_t) blockSize), pResult);
 150 }
 151
 152 /**
 153  * @} end of RMS group
 154  */