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1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 *
4 * $Date: 17. January 2013
5 * $Revision: V1.4.1
6 *
7 * Project: CMSIS DSP Library
8 * Title: arm_copy_q31.c
9 *
10 * Description: Copies the elements of a Q31 vector.
11 *
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 * -------------------------------------------------------------------- */
40
41 #include "arm_math.h"
42
43 /**
44 * @ingroup groupSupport
45 */
46
47 /**
48 * @addtogroup copy
49 * @{
50 */
51
52 /**
53 * @brief Copies the elements of a Q31 vector.
54 * @param[in] *pSrc points to input vector
55 * @param[out] *pDst points to output vector
56 * @param[in] blockSize length of the input vector
57 * @return none.
58 *
59 */
60
61 void arm_copy_q31(
62 q31_t * pSrc,
63 q31_t * pDst,
64 uint32_t blockSize)
65 {
66 uint32_t blkCnt; /* loop counter */
67
68
69 #ifndef ARM_MATH_CM0_FAMILY
70
71 /* Run the below code for Cortex-M4 and Cortex-M3 */
72 q31_t in1, in2, in3, in4;
73
74 /*loop Unrolling */
75 blkCnt = blockSize >> 2u;
76
77 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
78 ** a second loop below computes the remaining 1 to 3 samples. */
79 while(blkCnt > 0u)
80 {
81 /* C = A */
82 /* Copy and then store the values in the destination buffer */
83 in1 = *pSrc++;
84 in2 = *pSrc++;
85 in3 = *pSrc++;
86 in4 = *pSrc++;
87
88 *pDst++ = in1;
89 *pDst++ = in2;
90 *pDst++ = in3;
91 *pDst++ = in4;
92
93 /* Decrement the loop counter */
94 blkCnt--;
95 }
96
97 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
98 ** No loop unrolling is used. */
99 blkCnt = blockSize % 0x4u;
100
101 #else
102
103 /* Run the below code for Cortex-M0 */
104
105 /* Loop over blockSize number of values */
106 blkCnt = blockSize;
107
108 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
109
110 while(blkCnt > 0u)
111 {
112 /* C = A */
113 /* Copy and then store the value in the destination buffer */
114 *pDst++ = *pSrc++;
115
116 /* Decrement the loop counter */
117 blkCnt--;
118 }
119 }
120
121 /**
122 * @} end of BasicCopy group
123 */
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