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1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 *
4 * $Date: 17. January 2013
5 * $Revision: V1.4.1
6 *
7 * Project: CMSIS DSP Library
8 * Title: arm_copy_q7.c
9 *
10 * Description: Copies the elements of a Q7 vector.
11 *
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 * -------------------------------------------------------------------- */
40
41 #include "arm_math.h"
42
43 /**
44 * @ingroup groupSupport
45 */
46
47 /**
48 * @addtogroup copy
49 * @{
50 */
51
52 /**
53 * @brief Copies the elements of a Q7 vector.
54 * @param[in] *pSrc points to input vector
55 * @param[out] *pDst points to output vector
56 * @param[in] blockSize length of the input vector
57 * @return none.
58 *
59 */
60
61 void arm_copy_q7(
62 q7_t * pSrc,
63 q7_t * pDst,
64 uint32_t blockSize)
65 {
66 uint32_t blkCnt; /* loop counter */
67
68 #ifndef ARM_MATH_CM0_FAMILY
69
70 /* Run the below code for Cortex-M4 and Cortex-M3 */
71
72 /*loop Unrolling */
73 blkCnt = blockSize >> 2u;
74
75 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
76 ** a second loop below computes the remaining 1 to 3 samples. */
77 while(blkCnt > 0u)
78 {
79 /* C = A */
80 /* Copy and then store the results in the destination buffer */
81 /* 4 samples are copied and stored at a time using SIMD */
82 *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
83
84 /* Decrement the loop counter */
85 blkCnt--;
86 }
87
88 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
89 ** No loop unrolling is used. */
90 blkCnt = blockSize % 0x4u;
91
92 #else
93
94 /* Run the below code for Cortex-M0 */
95
96 /* Loop over blockSize number of values */
97 blkCnt = blockSize;
98
99 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100
101
102 while(blkCnt > 0u)
103 {
104 /* C = A */
105 /* Copy and then store the results in the destination buffer */
106 *pDst++ = *pSrc++;
107
108 /* Decrement the loop counter */
109 blkCnt--;
110 }
111 }
112
113 /**
114 * @} end of BasicCopy group
115 */
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