tmk_core/tool/mbed/mbed-sdk/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_q31.c

   1 /* ----------------------------------------------------------------------------
   2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
   3 *
   4 * $Date:        17. January 2013
   5 * $Revision:    V1.4.1
   6 *
   7 * Project:          CMSIS DSP Library
   8 * Title:                arm_q15_to_q31.c
   9 *
  10 * Description:  Converts the elements of the Q15 vector to Q31 vector.
  11 *
  12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13 *
  14 * Redistribution and use in source and binary forms, with or without
  15 * modification, are permitted provided that the following conditions
  16 * are met:
  17 *   - Redistributions of source code must retain the above copyright
  18 *     notice, this list of conditions and the following disclaimer.
  19 *   - Redistributions in binary form must reproduce the above copyright
  20 *     notice, this list of conditions and the following disclaimer in
  21 *     the documentation and/or other materials provided with the
  22 *     distribution.
  23 *   - Neither the name of ARM LIMITED nor the names of its contributors
  24 *     may be used to endorse or promote products derived from this
  25 *     software without specific prior written permission.
  26 *
  27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38 * POSSIBILITY OF SUCH DAMAGE.
  39 * ---------------------------------------------------------------------------- */
  40
  41 #include "arm_math.h"
  42
  43 /**
  44  * @ingroup groupSupport
  45  */
  46
  47 /**
  48  * @addtogroup q15_to_x
  49  * @{
  50  */
  51
  52 /**
  53  * @brief Converts the elements of the Q15 vector to Q31 vector.
  54  * @param[in]       *pSrc points to the Q15 input vector
  55  * @param[out]      *pDst points to the Q31 output vector
  56  * @param[in]       blockSize length of the input vector
  57  * @return none.
  58  *
  59  * \par Description:
  60  *
  61  * The equation used for the conversion process is:
  62  *
  63  * <pre>
  64  *      pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.
  65  * </pre>
  66  *
  67  */
  68
  69
  70 void arm_q15_to_q31(
  71   q15_t * pSrc,
  72   q31_t * pDst,
  73   uint32_t blockSize)
  74 {
  75   q15_t *pIn = pSrc;                             /* Src pointer */
  76   uint32_t blkCnt;                               /* loop counter */
  77
  78 #ifndef ARM_MATH_CM0_FAMILY
  79
  80   /* Run the below code for Cortex-M4 and Cortex-M3 */
  81   q31_t in1, in2;
  82   q31_t out1, out2, out3, out4;
  83
  84   /*loop Unrolling */
  85   blkCnt = blockSize >> 2u;
  86
  87   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
  88    ** a second loop below computes the remaining 1 to 3 samples. */
  89   while(blkCnt > 0u)
  90   {
  91     /* C = (q31_t)A << 16 */
  92     /* convert from q15 to q31 and then store the results in the destination buffer */
  93     in1 = *__SIMD32(pIn)++;
  94     in2 = *__SIMD32(pIn)++;
  95
  96 #ifndef ARM_MATH_BIG_ENDIAN
  97
  98     /* extract lower 16 bits to 32 bit result */
  99     out1 = in1 << 16u;
 100     /* extract upper 16 bits to 32 bit result */
 101     out2 = in1 & 0xFFFF0000;
 102     /* extract lower 16 bits to 32 bit result */
 103     out3 = in2 << 16u;
 104     /* extract upper 16 bits to 32 bit result */
 105     out4 = in2 & 0xFFFF0000;
 106
 107 #else
 108
 109     /* extract upper 16 bits to 32 bit result */
 110     out1 = in1 & 0xFFFF0000;
 111     /* extract lower 16 bits to 32 bit result */
 112     out2 = in1 << 16u;
 113     /* extract upper 16 bits to 32 bit result */
 114     out3 = in2 & 0xFFFF0000;
 115     /* extract lower 16 bits to 32 bit result */
 116     out4 = in2 << 16u;
 117
 118 #endif //      #ifndef ARM_MATH_BIG_ENDIAN
 119
 120     *pDst++ = out1;
 121     *pDst++ = out2;
 122     *pDst++ = out3;
 123     *pDst++ = out4;
 124
 125     /* Decrement the loop counter */
 126     blkCnt--;
 127   }
 128
 129   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
 130    ** No loop unrolling is used. */
 131   blkCnt = blockSize % 0x4u;
 132
 133 #else
 134
 135   /* Run the below code for Cortex-M0 */
 136
 137   /* Loop over blockSize number of values */
 138   blkCnt = blockSize;
 139
 140 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
 141
 142   while(blkCnt > 0u)
 143   {
 144     /* C = (q31_t)A << 16 */
 145     /* convert from q15 to q31 and then store the results in the destination buffer */
 146     *pDst++ = (q31_t) * pIn++ << 16;
 147
 148     /* Decrement the loop counter */
 149     blkCnt--;
 150   }
 151
 152 }
 153
 154 /**
 155  * @} end of q15_to_x group
 156  */