tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/startup_MK20DX256.s

   1 /* File: startup_MK20DX256.s
   2  * Purpose: startup file for Cortex-M4 devices. Should use with
   3  *   GCC for ARM Embedded Processors
   4  * Version: V1.3
   5  * Date: 08 Feb 2012
   6  *
   7  * Copyright (c) 2015, ARM Limited
   8  * All rights reserved.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions are met:
  12     * Redistributions of source code must retain the above copyright
  13       notice, this list of conditions and the following disclaimer.
  14     * Redistributions in binary form must reproduce the above copyright
  15       notice, this list of conditions and the following disclaimer in the
  16       documentation and/or other materials provided with the distribution.
  17     * Neither the name of the ARM Limited nor the
  18       names of its contributors may be used to endorse or promote products
  19       derived from this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  23  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  24  * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
  25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  28  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  30  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32     .syntax unified
  33     .arch armv7-m
  34
  35     .section .stack
  36     .align 3
  37 #ifdef __STACK_SIZE
  38     .equ    Stack_Size, __STACK_SIZE
  39 #else
  40     .equ    Stack_Size, 0x400
  41 #endif
  42     .globl    __StackTop
  43     .globl    __StackLimit
  44 __StackLimit:
  45     .space    Stack_Size
  46     .size __StackLimit, . - __StackLimit
  47 __StackTop:
  48     .size __StackTop, . - __StackTop
  49
  50     .section .heap
  51     .align 3
  52 #ifdef __HEAP_SIZE
  53     .equ    Heap_Size, __HEAP_SIZE
  54 #else
  55     .equ    Heap_Size, 0xC00
  56 #endif
  57     .globl    __HeapBase
  58     .globl    __HeapLimit
  59 __HeapBase:
  60     .if    Heap_Size
  61     .space    Heap_Size
  62     .endif
  63     .size __HeapBase, . - __HeapBase
  64 __HeapLimit:
  65     .size __HeapLimit, . - __HeapLimit
  66
  67     .section .isr_vector
  68     .align 2
  69     .globl __isr_vector
  70
  71 __isr_vector:
  72     .long    __StackTop            /* Top of Stack */
  73     .long    Reset_Handler         /* Reset Handler */
  74     .long    NMI_Handler           /* NMI Handler */
  75     .long    HardFault_Handler     /* Hard Fault Handler */
  76     .long    MemManage_Handler     /* MPU Fault Handler */
  77     .long    BusFault_Handler      /* Bus Fault Handler */
  78     .long    UsageFault_Handler    /* Usage Fault Handler */
  79     .long    0                     /* Reserved */
  80     .long    0                     /* Reserved */
  81     .long    0                     /* Reserved */
  82     .long    0                     /* Reserved */
  83     .long    SVC_Handler           /* SVCall Handler */
  84     .long    DebugMon_Handler      /* Debug Monitor Handler */
  85     .long    0                     /* Reserved */
  86     .long    PendSV_Handler        /* PendSV Handler */
  87     .long    SysTick_Handler       /* SysTick Handler */
  88
  89     /* External interrupts */
  90                 .long     DMA0_IRQHandler   // DMA channel 0 transfer complete interrupt
  91                 .long     DMA1_IRQHandler   // DMA channel 0 transfer complete interrupt
  92                 .long     DMA2_IRQHandler   // DMA channel 0 transfer complete interrupt
  93                 .long     DMA3_IRQHandler   // DMA channel 0 transfer complete interrupt
  94                 .long     DMA4_IRQHandler   // DMA channel 0 transfer complete interrupt
  95                 .long     DMA5_IRQHandler   // DMA channel 0 transfer complete interrupt
  96                 .long     DMA6_IRQHandler   // DMA channel 0 transfer complete interrupt
  97                 .long     DMA7_IRQHandler   // DMA channel 0 transfer complete interrupt
  98                 .long     DMA8_IRQHandler   // DMA channel 0 transfer complete interrupt
  99                 .long     DMA9_IRQHandler   // DMA channel 0 transfer complete interrupt
 100                 .long     DMA10_IRQHandler  // DMA channel 0 transfer complete interrupt
 101                 .long     DMA11_IRQHandler  // DMA channel 0 transfer complete interrupt
 102                 .long     DMA12_IRQHandler  // DMA channel 0 transfer complete interrupt
 103                 .long     DMA13_IRQHandler  // DMA channel 0 transfer complete interrupt
 104                 .long     DMA14_IRQHandler  // DMA channel 0 transfer complete interrupt
 105                 .long     DMA15_IRQHandler  // DMA channel 0 transfer complete interrupt
 106                 .long     DMA_Error_IRQHandler      // DMA error interrupt
 107                 .long     Reserved33_IRQHandler     // Reserved interrupt 33
 108                 .long     FTFL_IRQHandler           // FTFL interrupt
 109                 .long     Read_Collision_IRQHandler // Read collision interrupt
 110                 .long     LVD_LVW_IRQHandler        // Low Voltage Detect, Low Voltage Warning
 111                 .long     LLW_IRQHandler            // Low Leakage Wakeup
 112                 .long     Watchdog_IRQHandler       // WDOG interrupt
 113                 .long     Reserved39_IRQHandler     // Reserved interrupt 39
 114                 .long     I2C0_IRQHandler           // I2C0 interrupt
 115                 .long     I2C1_IRQHandler           // I2C1 interrupt
 116                 .long     SPI0_IRQHandler           // SPI0 interrupt
 117                 .long     SPI1_IRQHandler           // SPI1 interrupt
 118                 .long     Reserved44_IRQHandler     // Reserved interrupt 44
 119                 .long     CAN0_ORed_Message_buffer_IRQHandler   // CAN0 OR'd message buffers interrupt
 120                 .long     CAN0_Bus_Off_IRQHandler       // CAN0 bus off interrupt
 121                 .long     CAN0_Error_IRQHandler         // CAN0 error interrupt
 122                 .long     CAN0_Tx_Warning_IRQHandler    // CAN0 Tx warning interrupt
 123                 .long     CAN0_Rx_Warning_IRQHandler    // CAN0 Rx warning interrupt
 124                 .long     CAN0_Wake_Up_IRQHandler       // CAN0 wake up interrupt
 125                 .long     I2S0_Tx_IRQHandler        // I2S0 transmit interrupt
 126                 .long     I2S0_Rx_IRQHandler        // I2S0 receive interrupt
 127                 .long     Reserved53_IRQHandler     // Reserved interrupt 53
 128                 .long     Reserved54_IRQHandler     // Reserved interrupt 54
 129                 .long     Reserved55_IRQHandler     // Reserved interrupt 55
 130                 .long     Reserved56_IRQHandler     // Reserved interrupt 56
 131                 .long     Reserved57_IRQHandler     // Reserved interrupt 57
 132                 .long     Reserved58_IRQHandler     // Reserved interrupt 58
 133                 .long     Reserved59_IRQHandler     // Reserved interrupt 59
 134                 .long     UART0_LON_IRQHandler      // UART0 LON interrupt
 135                 .long     UART0_RX_TX_IRQHandler    // UART0 receive/transmit interrupt
 136                 .long     UART0_ERR_IRQHandler      // UART0 error interrupt
 137                 .long     UART1_RX_TX_IRQHandler    // UART1 receive/transmit interrupt
 138                 .long     UART1_ERR_IRQHandler      // UART1 error interrupt
 139                 .long     UART2_RX_TX_IRQHandler    // UART2 receive/transmit interrupt
 140                 .long     UART2_ERR_IRQHandler      // UART2 error interrupt
 141                 .long     Reserved67_IRQHandler     // Reserved interrupt 67
 142                 .long     Reserved68_IRQHandler     // Reserved interrupt 68
 143                 .long     Reserved69_IRQHandler     // Reserved interrupt 69
 144                 .long     Reserved70_IRQHandler     // Reserved interrupt 70
 145                 .long     Reserved71_IRQHandler     // Reserved interrupt 71
 146                 .long     Reserved72_IRQHandler     // Reserved interrupt 72
 147                 .long     ADC0_IRQHandler   // ADC0 interrupt
 148                 .long     ADC1_IRQHandler   // ADC1 interrupt
 149                 .long     CMP0_IRQHandler   // CMP0 interrupt
 150                 .long     CMP1_IRQHandler   // CMP1 interrupt
 151                 .long     CMP2_IRQHandler   // CMP2 interrupt
 152                 .long     FTM0_IRQHandler   // FTM0 fault, overflow and channels interrupt
 153                 .long     FTM1_IRQHandler   // FTM1 fault, overflow and channels interrupt
 154                 .long     FTM2_IRQHandler   // FTM2 fault, overflow and channels interrupt
 155                 .long     CMT_IRQHandler    // CMT interrupt
 156                 .long     RTC_IRQHandler    // RTC interrupt
 157                 .long     RTC_Seconds_IRQHandler    // RTC seconds interrupt
 158                 .long     PIT0_IRQHandler   // PIT timer channel 0 interrupt
 159                 .long     PIT1_IRQHandler   // PIT timer channel 1 interrupt
 160                 .long     PIT2_IRQHandler   // PIT timer channel 2 interrupt
 161                 .long     PIT3_IRQHandler   // PIT timer channel 3 interrupt
 162                 .long     PDB0_IRQHandler   // PDB0 interrupt
 163                 .long     USB0_IRQHandler   // USB0 interrupt
 164                 .long     USBDCD_IRQHandler // USBDCD interrupt
 165                 .long     Reserved91_IRQHandler     // Reserved interrupt 91
 166                 .long     Reserved92_IRQHandler     // Reserved interrupt 92
 167                 .long     Reserved93_IRQHandler     // Reserved interrupt 93
 168                 .long     Reserved94_IRQHandler     // Reserved interrupt 94
 169                 .long     Reserved95_IRQHandler     // Reserved interrupt 95
 170                 .long     Reserved96_IRQHandler     // Reserved interrupt 96
 171                 .long     DAC0_IRQHandler       // DAC0 interrupt
 172                 .long     Reserved98_IRQHandler     // Reserved interrupt 98
 173                 .long     TSI0_IRQHandler       // TSI0 interrupt
 174                 .long     MCG_IRQHandler        // MCG interrupt
 175                 .long     LPTimer_IRQHandler    // LPTimer interrupt
 176                 .long     Reserved102_IRQHandler    // Reserved interrupt 102
 177                 .long     PORTA_IRQHandler      // Port A interrupt
 178                 .long     PORTB_IRQHandler      // Port B interrupt
 179                 .long     PORTC_IRQHandler      // Port C interrupt
 180                 .long     PORTD_IRQHandler      // Port D interrupt
 181                 .long     PORTE_IRQHandler      // Port E interrupt
 182                 .long     Reserved108_IRQHandler    // Reserved interrupt 108
 183                 .long     Reserved109_IRQHandler    // Reserved interrupt 109
 184                 .long     SWI_IRQHandler        // Software interrupt
 185
 186     .size    __isr_vector, . - __isr_vector
 187
 188     .section .text.Reset_Handler
 189     .thumb
 190     .thumb_func
 191     .align 2
 192     .globl    Reset_Handler
 193     .type    Reset_Handler, %function
 194 Reset_Handler:
 195 /*
 196  *    Call SystemInit before loading the .data section to prevent the watchdog
 197  *    from resetting the board.
 198  */
 199     ldr    r0, =SystemInit
 200     blx    r0
 201
 202 /*     Loop to copy data from read only memory to RAM. The ranges
 203  *      of copy from/to are specified by following symbols evaluated in
 204  *      linker script.
 205  *      __etext: End of code section, i.e., begin of data sections to copy from.
 206  *      __data_start__/__data_end__: RAM address range that data should be
 207  *      copied to. Both must be aligned to 4 bytes boundary.  */
 208
 209     ldr    r1, =__etext
 210     ldr    r2, =__data_start__
 211     ldr    r3, =__data_end__
 212
 213 .Lflash_to_ram_loop:
 214     cmp     r2, r3
 215     ittt    lt
 216     ldrlt   r0, [r1], #4
 217     strlt   r0, [r2], #4
 218     blt    .Lflash_to_ram_loop
 219
 220 .Lflash_to_ram_loop_end:
 221
 222     ldr    r0, =_start
 223     bx    r0
 224     .pool
 225     .size Reset_Handler, . - Reset_Handler
 226
 227     .text
 228 /*    Macro to define default handlers. Default handler
 229  *    will be weak symbol and just dead loops. They can be
 230  *    overwritten by other handlers */
 231     .macro    def_default_handler    handler_name
 232     .align 1
 233     .thumb_func
 234     .weak    \handler_name
 235     .type    \handler_name, %function
 236 \handler_name :
 237     b    .
 238     .size    \handler_name, . - \handler_name
 239     .endm
 240
 241     def_default_handler    NMI_Handler
 242     def_default_handler    HardFault_Handler
 243     def_default_handler    MemManage_Handler
 244     def_default_handler    BusFault_Handler
 245     def_default_handler    UsageFault_Handler
 246     def_default_handler    SVC_Handler
 247     def_default_handler    DebugMon_Handler
 248     def_default_handler    PendSV_Handler
 249     def_default_handler    SysTick_Handler
 250     def_default_handler    Default_Handler
 251
 252     .macro    def_irq_default_handler    handler_name
 253     .weak     \handler_name
 254     .set      \handler_name, Default_Handler
 255     .endm
 256
 257
 258                 def_irq_default_handler  DMA0_IRQHandler
 259                 def_irq_default_handler  DMA1_IRQHandler
 260                 def_irq_default_handler  DMA2_IRQHandler
 261                 def_irq_default_handler  DMA3_IRQHandler
 262                 def_irq_default_handler  DMA4_IRQHandler
 263                 def_irq_default_handler  DMA5_IRQHandler
 264                 def_irq_default_handler  DMA6_IRQHandler
 265                 def_irq_default_handler  DMA7_IRQHandler
 266                 def_irq_default_handler  DMA8_IRQHandler
 267                 def_irq_default_handler  DMA9_IRQHandler
 268                 def_irq_default_handler  DMA10_IRQHandler
 269                 def_irq_default_handler  DMA11_IRQHandler
 270                 def_irq_default_handler  DMA12_IRQHandler
 271                 def_irq_default_handler  DMA13_IRQHandler
 272                 def_irq_default_handler  DMA14_IRQHandler
 273                 def_irq_default_handler  DMA15_IRQHandler
 274                 def_irq_default_handler  DMA_Error_IRQHandler
 275                 def_irq_default_handler  Reserved33_IRQHandler
 276                 def_irq_default_handler  FTFL_IRQHandler
 277                 def_irq_default_handler  Read_Collision_IRQHandler
 278                 def_irq_default_handler  LVD_LVW_IRQHandler
 279                 def_irq_default_handler  LLW_IRQHandler
 280                 def_irq_default_handler  Watchdog_IRQHandler
 281                 def_irq_default_handler  Reserved39_IRQHandler
 282                 def_irq_default_handler  I2C0_IRQHandler
 283                 def_irq_default_handler  I2C1_IRQHandler
 284                 def_irq_default_handler  SPI0_IRQHandler
 285                 def_irq_default_handler  SPI1_IRQHandler
 286                 def_irq_default_handler  Reserved44_IRQHandler
 287                 def_irq_default_handler  CAN0_ORed_Message_buffer_IRQHandler
 288                 def_irq_default_handler  CAN0_Bus_Off_IRQHandler
 289                 def_irq_default_handler  CAN0_Error_IRQHandler
 290                 def_irq_default_handler  CAN0_Tx_Warning_IRQHandler
 291                 def_irq_default_handler  CAN0_Rx_Warning_IRQHandler
 292                 def_irq_default_handler  CAN0_Wake_Up_IRQHandler
 293                 def_irq_default_handler  I2S0_Tx_IRQHandler
 294                 def_irq_default_handler  I2S0_Rx_IRQHandler
 295                 def_irq_default_handler  Reserved53_IRQHandler
 296                 def_irq_default_handler  Reserved54_IRQHandler
 297                 def_irq_default_handler  Reserved55_IRQHandler
 298                 def_irq_default_handler  Reserved56_IRQHandler
 299                 def_irq_default_handler  Reserved57_IRQHandler
 300                 def_irq_default_handler  Reserved58_IRQHandler
 301                 def_irq_default_handler  Reserved59_IRQHandler
 302                 def_irq_default_handler  UART0_LON_IRQHandler
 303                 def_irq_default_handler  UART0_RX_TX_IRQHandler
 304                 def_irq_default_handler  UART0_ERR_IRQHandler
 305                 def_irq_default_handler  UART1_RX_TX_IRQHandler
 306                 def_irq_default_handler  UART1_ERR_IRQHandler
 307                 def_irq_default_handler  UART2_RX_TX_IRQHandler
 308                 def_irq_default_handler  UART2_ERR_IRQHandler
 309                 def_irq_default_handler  Reserved67_IRQHandler
 310                 def_irq_default_handler  Reserved68_IRQHandler
 311                 def_irq_default_handler  Reserved69_IRQHandler
 312                 def_irq_default_handler  Reserved70_IRQHandler
 313                 def_irq_default_handler  Reserved71_IRQHandler
 314                 def_irq_default_handler  Reserved72_IRQHandler
 315                 def_irq_default_handler  ADC0_IRQHandler
 316                 def_irq_default_handler  ADC1_IRQHandler
 317                 def_irq_default_handler  CMP0_IRQHandler
 318                 def_irq_default_handler  CMP1_IRQHandler
 319                 def_irq_default_handler  CMP2_IRQHandler
 320                 def_irq_default_handler  FTM0_IRQHandler
 321                 def_irq_default_handler  FTM1_IRQHandler
 322                 def_irq_default_handler  FTM2_IRQHandler
 323                 def_irq_default_handler  CMT_IRQHandler
 324                 def_irq_default_handler  RTC_IRQHandler
 325                 def_irq_default_handler  RTC_Seconds_IRQHandler
 326                 def_irq_default_handler  PIT0_IRQHandler
 327                 def_irq_default_handler  PIT1_IRQHandler
 328                 def_irq_default_handler  PIT2_IRQHandler
 329                 def_irq_default_handler  PIT3_IRQHandler
 330                 def_irq_default_handler  PDB0_IRQHandler
 331                 def_irq_default_handler  USB0_IRQHandler
 332                 def_irq_default_handler  USBDCD_IRQHandler
 333                 def_irq_default_handler  Reserved91_IRQHandler
 334                 def_irq_default_handler  Reserved92_IRQHandler
 335                 def_irq_default_handler  Reserved93_IRQHandler
 336                 def_irq_default_handler  Reserved94_IRQHandler
 337                 def_irq_default_handler  Reserved95_IRQHandler
 338                 def_irq_default_handler  Reserved96_IRQHandler
 339                 def_irq_default_handler  DAC0_IRQHandler
 340                 def_irq_default_handler  Reserved98_IRQHandler
 341                 def_irq_default_handler  TSI0_IRQHandler
 342                 def_irq_default_handler  MCG_IRQHandler
 343                 def_irq_default_handler  LPTimer_IRQHandler
 344                 def_irq_default_handler  Reserved102_IRQHandler
 345                 def_irq_default_handler  PORTA_IRQHandler
 346                 def_irq_default_handler  PORTB_IRQHandler
 347                 def_irq_default_handler  PORTC_IRQHandler
 348                 def_irq_default_handler  PORTD_IRQHandler
 349                 def_irq_default_handler  PORTE_IRQHandler
 350                 def_irq_default_handler  Reserved108_IRQHandler
 351                 def_irq_default_handler  Reserved109_IRQHandler
 352                 def_irq_default_handler  SWI_IRQHandler
 353                 def_irq_default_handler  DefaultISR
 354
 355 /* Flash protection region, placed at 0x400 */
 356     .text
 357     .thumb
 358     .align 2
 359     .section .kinetis_flash_config_field,"a",%progbits
 360 kinetis_flash_config:
 361     .long 0xffffffff
 362     .long 0xffffffff
 363     .long 0xffffffff
 364     .long 0xfffffffe
 365
 366     .end