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[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_Freescale / TARGET_KLXX / TARGET_KL05Z / TOOLCHAIN_IAR / startup_MKL05Z4.s
1 /**************************************************
2 *
3 * Copyright 2012 IAR Systems. All rights reserved.
4 *
5 * $Revision: 16 $
6 *
7 **************************************************/
8
9 ;
10 ; The modules in this file are included in the libraries, and may be replaced
11 ; by any user-defined modules that define the PUBLIC symbol _program_start or
12 ; a user defined start symbol.
13 ; To override the cstartup defined in the library, simply add your modified
14 ; version to the workbench project.
15 ;
16 ; The vector table is normally located at address 0.
17 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
18 ; The name "__vector_table" has special meaning for C-SPY:
19 ; it is where the SP start value is found, and the NVIC vector
20 ; table register (VTOR) is initialized to this address if != 0.
21 ;
22 ; Cortex-M version
23 ;
24
25 MODULE ?cstartup
26
27 ;; Forward declaration of sections.
28 SECTION CSTACK:DATA:NOROOT(3)
29
30 SECTION .intvec:CODE:ROOT(2)
31
32 EXTERN __iar_program_start
33 EXTERN SystemInit
34 PUBLIC __vector_table
35
36 DATA
37 __vector_table
38 DCD sfe(CSTACK) ; Top of Stack
39 DCD Reset_Handler ; Reset Handler
40 DCD NMI_Handler ; NMI Handler
41 DCD HardFault_Handler ; Hard Fault Handler
42 DCD 0 ; Reserved
43 DCD 0 ; Reserved
44 DCD 0 ; Reserved
45 DCD 0 ; Reserved
46 DCD 0 ; Reserved
47 DCD 0 ; Reserved
48 DCD 0 ; Reserved
49 DCD SVC_Handler ; SVCall Handler
50 DCD 0 ; Reserved
51 DCD 0 ; Reserved
52 DCD PendSV_Handler ; PendSV Handler
53 DCD SysTick_Handler ; SysTick Handler
54 ; External Interrupts
55 DCD DMA0_IRQHandler ; 0: DMA Channel 0 transfer complete intertrupt
56 DCD DMA1_IRQHandler ; 1: DMA Channel 1 transfer complete intertrupt
57 DCD DMA2_IRQHandler ; 2: DMA Channel 2 transfer complete intertrupt
58 DCD DMA3_IRQHandler ; 3: DMA Channel 3 transfer complete intertrupt
59 DCD 0 ; 4: Reserved
60 DCD FTFA_IRQHandler ; 5: FTFA
61 DCD LVD_LVW_IRQHandler ; 6: Low-voltage detect, low-voltage warning
62 DCD LLW_IRQHandler ; 7: Low Leakage Wakeup
63 DCD I2C0_IRQHandler ; 8: IIC 0 interrupt
64 DCD 0 ; 9: Reserved
65 DCD SPI0_IRQHandler ;10: SPI0 intertrupt
66 DCD 0 ;11: Reserved
67 DCD UART0_IRQHandler ;12: UART 0 status and error intertrupt
68 DCD 0 ;13: Reserved
69 DCD 0 ;14: Reserved
70 DCD ADC0_IRQHandler ;15: ADC 0 interrupt
71 DCD CMP0_IRQHandler ;16: CMP 0 interrupt
72 DCD TPM0_IRQHandler ;17: TPM 0 interrupt
73 DCD TPM1_IRQHandler ;18: TPM 1 interrupt
74 DCD 0 ;19: Reserved
75 DCD RTC_IRQHandler ;20: RTC interrupt
76 DCD RTC_Seconds_IRQHandler ;21: RTC Seconds interrupt
77 DCD PIT_IRQHandler ;22: PIT Single interrupt vector for all channels
78 DCD 0 ;23: Reserved
79 DCD 0 ;24: Reserved
80 DCD DAC0_IRQHandler ;25: UART 0 status intertrupt
81 DCD TSI0_IRQHandler ;26: TSI 0 interrupt
82 DCD MCG_IRQHandler ;27: MCG intertrupt
83 DCD LPTimer_IRQHandler ;28: LPTimer interrupt
84 DCD 0 ;29: Reserved
85 DCD PORTA_IRQHandler ;30: PORT A interrupt
86 DCD PORTB_IRQHandler ;31: PORT B interrupt
87 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
88 ;;Flash Configuration
89 ;;16-byte flash configuration field that stores default protection settings (loaded on reset)
90 ;;and security information that allows the MCU to restrict acces to the FTFL module.
91
92 BackDoorK0 EQU 0xFF
93 BackDoorK1 EQU 0xFF
94 BackDoorK2 EQU 0xFF
95 BackDoorK3 EQU 0xFF
96 BackDoorK4 EQU 0xFF
97 BackDoorK5 EQU 0xFF
98 BackDoorK6 EQU 0xFF
99 BackDoorK7 EQU 0xFF
100
101 nFPROT0 EQU 0x00
102 FPROT0 EQU nFPROT0^0xFF
103
104 nFPROT1 EQU 0x00
105 FPROT1 EQU nFPROT1^0xFF
106
107 nFPROT2 EQU 0x00
108 FPROT2 EQU nFPROT2^0xFF
109
110 nFPROT3 EQU 0x00
111 FPROT3 EQU nFPROT3^0xFF
112
113 FOPT EQU 0xFF
114
115 FSEC EQU 0xFE
116 SECTION FlashConfig:CONST:REORDER:ROOT(2)
117 Config:
118 DATA
119 DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
120 DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
121 DCB FPROT0, FPROT1, FPROT2, FPROT3
122 DCB FSEC, FOPT, 0xFF, 0xFF
123 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
124 ;;
125 ;; Default interrupt handlers.
126 ;;
127 THUMB
128 PUBWEAK Reset_Handler
129 SECTION .text:CODE:NOROOT:REORDER(2)
130 Reset_Handler
131
132 LDR R0, =SystemInit
133 BLX R0
134 LDR R0, =__iar_program_start
135 BX R0
136
137 PUBWEAK NMI_Handler
138 PUBWEAK HardFault_Handler
139 PUBWEAK SVC_Handler
140 PUBWEAK PendSV_Handler
141 PUBWEAK SysTick_Handler
142 PUBWEAK DMA0_IRQHandler
143 PUBWEAK DMA1_IRQHandler
144 PUBWEAK DMA2_IRQHandler
145 PUBWEAK DMA3_IRQHandler
146 PUBWEAK FTFA_IRQHandler
147 PUBWEAK LVD_LVW_IRQHandler
148 PUBWEAK LLW_IRQHandler
149 PUBWEAK I2C0_IRQHandler
150 PUBWEAK SPI0_IRQHandler
151 PUBWEAK UART0_IRQHandler
152 PUBWEAK ADC0_IRQHandler
153 PUBWEAK CMP0_IRQHandler
154 PUBWEAK TPM0_IRQHandler
155 PUBWEAK TPM1_IRQHandler
156 PUBWEAK RTC_IRQHandler
157 PUBWEAK RTC_Seconds_IRQHandler
158 PUBWEAK PIT_IRQHandler
159 PUBWEAK DAC0_IRQHandler
160 PUBWEAK TSI0_IRQHandler
161 PUBWEAK MCG_IRQHandler
162 PUBWEAK LPTimer_IRQHandler
163 PUBWEAK PORTA_IRQHandler
164 PUBWEAK PORTB_IRQHandler
165
166 SECTION .text:CODE:REORDER:NOROOT(1)
167 THUMB
168 NMI_Handler
169 HardFault_Handler
170 SVC_Handler
171 PendSV_Handler
172 SysTick_Handler
173 DMA0_IRQHandler
174 DMA1_IRQHandler
175 DMA2_IRQHandler
176 DMA3_IRQHandler
177 FTFA_IRQHandler
178 LVD_LVW_IRQHandler
179 LLW_IRQHandler
180 I2C0_IRQHandler
181 SPI0_IRQHandler
182 UART0_IRQHandler
183 ADC0_IRQHandler
184 CMP0_IRQHandler
185 TPM0_IRQHandler
186 TPM1_IRQHandler
187 RTC_IRQHandler
188 RTC_Seconds_IRQHandler
189 PIT_IRQHandler
190 DAC0_IRQHandler
191 TSI0_IRQHandler
192 MCG_IRQHandler
193 LPTimer_IRQHandler
194 PORTA_IRQHandler
195 PORTB_IRQHandler
196 Default_Handler
197
198 B Default_Handler
199 END
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