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[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_Freescale / TARGET_KLXX / TARGET_KL25Z / TOOLCHAIN_GCC_ARM / startup_MKL25Z4.s
1 /* KL25Z startup ARM GCC
2 * Purpose: startup file for Cortex-M0 devices. Should use with
3 * GCC for ARM Embedded Processors
4 * Version: V1.2
5 * Date: 15 Nov 2011
6 *
7 * Copyright (c) 2011, ARM Limited
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
12 * Redistributions of source code must retain the above copyright
13 notice, this list of conditions and the following disclaimer.
14 * Redistributions in binary form must reproduce the above copyright
15 notice, this list of conditions and the following disclaimer in the
16 documentation and/or other materials provided with the distribution.
17 * Neither the name of the ARM Limited nor the
18 names of its contributors may be used to endorse or promote products
19 derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32 .syntax unified
33 .arch armv6-m
34
35 /* Memory Model
36 The HEAP starts at the end of the DATA section and grows upward.
37
38 The STACK starts at the end of the RAM and grows downward.
39
40 The HEAP and stack STACK are only checked at compile time:
41 (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
42
43 This is just a check for the bare minimum for the Heap+Stack area before
44 aborting compilation, it is not the run time limit:
45 Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
46 */
47 .section .stack
48 .align 3
49 #ifdef __STACK_SIZE
50 .equ Stack_Size, __STACK_SIZE
51 #else
52 .equ Stack_Size, 0x80
53 #endif
54 .globl __StackTop
55 .globl __StackLimit
56 __StackLimit:
57 .space Stack_Size
58 .size __StackLimit, . - __StackLimit
59 __StackTop:
60 .size __StackTop, . - __StackTop
61
62 .section .heap
63 .align 3
64 #ifdef __HEAP_SIZE
65 .equ Heap_Size, __HEAP_SIZE
66 #else
67 .equ Heap_Size, 0x80
68 #endif
69 .globl __HeapBase
70 .globl __HeapLimit
71 __HeapBase:
72 .space Heap_Size
73 .size __HeapBase, . - __HeapBase
74 __HeapLimit:
75 .size __HeapLimit, . - __HeapLimit
76
77 .section .vector_table,"a",%progbits
78 .align 2
79 .globl __isr_vector
80 __isr_vector:
81 .long __StackTop /* Top of Stack */
82 .long Reset_Handler /* Reset Handler */
83 .long NMI_Handler /* NMI Handler */
84 .long HardFault_Handler /* Hard Fault Handler */
85 .long 0 /* Reserved */
86 .long 0 /* Reserved */
87 .long 0 /* Reserved */
88 .long 0 /* Reserved */
89 .long 0 /* Reserved */
90 .long 0 /* Reserved */
91 .long 0 /* Reserved */
92 .long SVC_Handler /* SVCall Handler */
93 .long 0 /* Reserved */
94 .long 0 /* Reserved */
95 .long PendSV_Handler /* PendSV Handler */
96 .long SysTick_Handler /* SysTick Handler */
97
98 /* External interrupts */
99 .long DMA0_IRQHandler /* DMA channel 0 transfer complete interrupt */
100 .long DMA1_IRQHandler /* DMA channel 1 transfer complete interrupt */
101 .long DMA2_IRQHandler /* DMA channel 2 transfer complete interrupt */
102 .long DMA3_IRQHandler /* DMA channel 3 transfer complete interrupt */
103 .long Default_Handler /* Reserved interrupt 20 */
104 .long FTFA_IRQHandler /* FTFA interrupt */
105 .long LVD_LVW_IRQHandler /* Low Voltage Detect, Low Voltage Warning */
106 .long LLW_IRQHandler /* Low Leakage Wakeup */
107 .long I2C0_IRQHandler /* I2C0 interrupt */
108 .long I2C1_IRQHandler /* I2C0 interrupt 25 */
109 .long SPI0_IRQHandler /* SPI0 interrupt */
110 .long SPI1_IRQHandler /* SPI1 interrupt */
111 .long UART0_IRQHandler /* UART0 status/error interrupt */
112 .long UART1_IRQHandler /* UART1 status/error interrupt */
113 .long UART2_IRQHandler /* UART2 status/error interrupt */
114 .long ADC0_IRQHandler /* ADC0 interrupt */
115 .long CMP0_IRQHandler /* CMP0 interrupt */
116 .long TPM0_IRQHandler /* TPM0 fault, overflow and channels interrupt */
117 .long TPM1_IRQHandler /* TPM1 fault, overflow and channels interrupt */
118 .long TPM2_IRQHandler /* TPM2 fault, overflow and channels interrupt */
119 .long RTC_IRQHandler /* RTC interrupt */
120 .long RTC_Seconds_IRQHandler /* RTC seconds interrupt */
121 .long PIT_IRQHandler /* PIT timer interrupt */
122 .long Default_Handler /* Reserved interrupt 39 */
123 .long USB0_IRQHandler /* USB0 interrupt */
124 .long DAC0_IRQHandler /* DAC interrupt */
125 .long TSI0_IRQHandler /* TSI0 interrupt */
126 .long MCG_IRQHandler /* MCG interrupt */
127 .long LPTimer_IRQHandler /* LPTimer interrupt */
128 .long Default_Handler /* Reserved interrupt 45 */
129 .long PORTA_IRQHandler /* Port A interrupt */
130 .long PORTD_IRQHandler /* Port D interrupt */
131
132 .size __isr_vector, . - __isr_vector
133
134 .section .text.Reset_Handler
135 .thumb
136 .thumb_func
137 .align 2
138 .globl Reset_Handler
139 .type Reset_Handler, %function
140 Reset_Handler:
141 /* Loop to copy data from read only memory to RAM. The ranges
142 * of copy from/to are specified by following symbols evaluated in
143 * linker script.
144 * __etext: End of code section, i.e., begin of data sections to copy from.
145 * __data_start__/__data_end__: RAM address range that data should be
146 * copied to. Both must be aligned to 4 bytes boundary. */
147
148 ldr r1, =__etext
149 ldr r2, =__data_start__
150 ldr r3, =__data_end__
151
152 subs r3, r2
153 ble .Lflash_to_ram_loop_end
154
155 movs r4, 0
156 .Lflash_to_ram_loop:
157 ldr r0, [r1,r4]
158 str r0, [r2,r4]
159 adds r4, 4
160 cmp r4, r3
161 blt .Lflash_to_ram_loop
162 .Lflash_to_ram_loop_end:
163
164 ldr r0, =SystemInit
165 blx r0
166 ldr r0, =_start
167 bx r0
168 .pool
169 .size Reset_Handler, . - Reset_Handler
170
171 .text
172 /* Macro to define default handlers. Default handler
173 * will be weak symbol and just dead loops. They can be
174 * overwritten by other handlers */
175 .macro def_default_handler handler_name
176 .align 1
177 .thumb_func
178 .weak \handler_name
179 .type \handler_name, %function
180 \handler_name :
181 b .
182 .size \handler_name, . - \handler_name
183 .endm
184
185 def_default_handler NMI_Handler
186 def_default_handler HardFault_Handler
187 def_default_handler SVC_Handler
188 def_default_handler PendSV_Handler
189 def_default_handler SysTick_Handler
190 def_default_handler Default_Handler
191
192 .macro def_irq_default_handler handler_name
193 .weak \handler_name
194 .set \handler_name, Default_Handler
195 .endm
196
197 def_irq_default_handler DMA0_IRQHandler
198 def_irq_default_handler DMA1_IRQHandler
199 def_irq_default_handler DMA2_IRQHandler
200 def_irq_default_handler DMA3_IRQHandler
201 def_irq_default_handler FTFA_IRQHandler
202 def_irq_default_handler LVD_LVW_IRQHandler
203 def_irq_default_handler LLW_IRQHandler
204 def_irq_default_handler I2C0_IRQHandler
205 def_irq_default_handler I2C1_IRQHandler
206 def_irq_default_handler SPI0_IRQHandler
207 def_irq_default_handler SPI1_IRQHandler
208 def_irq_default_handler UART0_IRQHandler
209 def_irq_default_handler UART1_IRQHandler
210 def_irq_default_handler UART2_IRQHandler
211 def_irq_default_handler ADC0_IRQHandler
212 def_irq_default_handler CMP0_IRQHandler
213 def_irq_default_handler TPM0_IRQHandler
214 def_irq_default_handler TPM1_IRQHandler
215 def_irq_default_handler TPM2_IRQHandler
216 def_irq_default_handler RTC_IRQHandler
217 def_irq_default_handler RTC_Seconds_IRQHandler
218 def_irq_default_handler PIT_IRQHandler
219 def_irq_default_handler USB0_IRQHandler
220 def_irq_default_handler DAC0_IRQHandler
221 def_irq_default_handler TSI0_IRQHandler
222 def_irq_default_handler MCG_IRQHandler
223 def_irq_default_handler LPTimer_IRQHandler
224 def_irq_default_handler PORTA_IRQHandler
225 def_irq_default_handler PORTD_IRQHandler
226 def_irq_default_handler DEF_IRQHandler
227
228 /* Flash protection region, placed at 0x400 */
229 .text
230 .thumb
231 .align 2
232 .section .kinetis_flash_config_field,"a",%progbits
233 kinetis_flash_config:
234 .long 0xffffffff
235 .long 0xffffffff
236 .long 0xffffffff
237 .long 0xfffffffe
238
239 .end
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