tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/aes_regs.h

   1 /*******************************************************************************
   2  * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
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   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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  20  * OTHER DEALINGS IN THE SOFTWARE.
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  22  * Except as contained in this notice, the name of Maxim Integrated
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  24  * Products, Inc. Branding Policy.
  25  *
  26  * The mere transfer of this software does not imply any licenses
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  32  */
  33
  34 #ifndef _MXC_AES_REGS_H_
  35 #define _MXC_AES_REGS_H_
  36
  37 #ifdef __cplusplus
  38 extern "C" {
  39 #endif
  40
  41 #include <stdint.h>
  42
  43 /**
  44  * @file  aes_regs.h
  45  * @addtogroup aes AES
  46  * @{
  47  */
  48
  49 /**
  50  * @brief  Settings for AES_CTRL.CRYPT_MODE
  51  */
  52 typedef enum {
  53     MXC_E_AES_CTRL_ENCRYPT_MODE = 0,
  54     MXC_E_AES_CTRL_DECRYPT_MODE = 1
  55 } mxc_aes_ctrl_crypt_mode_t;
  56
  57 /**
  58  * @brief Settings for AES_CTRL.EXP_KEY_MODE
  59  */
  60 typedef enum {
  61     MXC_E_AES_CTRL_CALC_NEW_EXP_KEY = 0,
  62     MXC_E_AES_CTRL_USE_LAST_EXP_KEY = 1
  63 } mxc_aes_ctrl_exp_key_mode_t;
  64
  65 /**
  66  * @brief Settings for AES_CTRL.KEY_SIZE
  67  */
  68 typedef enum {
  69     MXC_E_AES_CTRL_KEY_SIZE_128 = 0,
  70     MXC_E_AES_CTRL_KEY_SIZE_192 = 1,
  71     MXC_E_AES_CTRL_KEY_SIZE_256 = 2
  72 } mxc_aes_ctrl_key_size_t;
  73
  74 /*                                       Offset   Register Description
  75                                          ======   =========================================================== */
  76 typedef struct {
  77     __IO uint32_t ctrl;              /*  0x0000   AES Control and Status                                      */
  78     __I uint32_t rsv004;             /*  0x0004                                                               */
  79     __IO uint32_t erase_all;         /*  0x0008   Write to Trigger AES Memory Erase                           */
  80 } mxc_aes_regs_t;
  81
  82 /*                                       Offset   Register Description
  83                                          ======   =========================================================== */
  84 typedef struct {
  85     __IO uint32_t inp[4];            /*  0x0000   AES Input 0..3                                              */
  86     __IO uint32_t key[8];            /*  0x0010   AES Key 0..7                                                */
  87     __IO uint32_t out[4];            /*  0x0030   AES Output 0..3                                             */
  88     __IO uint32_t expkey[8];         /*  0x0040   AES Expanded Key Data 0..7                                  */
  89 } mxc_aes_mem_regs_t;
  90
  91 /*
  92    Register offsets for module AES.
  93 */
  94 #define MXC_R_AES_OFFS_CTRL                       ((uint32_t)0x00000000UL)
  95 #define MXC_R_AES_OFFS_ERASE_ALL                  ((uint32_t)0x00000008UL)
  96 #define MXC_R_AES_MEM_OFFS_INP0                   ((uint32_t)0x00000000UL)
  97 #define MXC_R_AES_MEM_OFFS_INP1                   ((uint32_t)0x00000004UL)
  98 #define MXC_R_AES_MEM_OFFS_INP2                   ((uint32_t)0x00000008UL)
  99 #define MXC_R_AES_MEM_OFFS_INP3                   ((uint32_t)0x0000000CUL)
 100 #define MXC_R_AES_MEM_OFFS_KEY0                   ((uint32_t)0x00000010UL)
 101 #define MXC_R_AES_MEM_OFFS_KEY1                   ((uint32_t)0x00000014UL)
 102 #define MXC_R_AES_MEM_OFFS_KEY2                   ((uint32_t)0x00000018UL)
 103 #define MXC_R_AES_MEM_OFFS_KEY3                   ((uint32_t)0x0000001CUL)
 104 #define MXC_R_AES_MEM_OFFS_KEY4                   ((uint32_t)0x00000020UL)
 105 #define MXC_R_AES_MEM_OFFS_KEY5                   ((uint32_t)0x00000024UL)
 106 #define MXC_R_AES_MEM_OFFS_KEY6                   ((uint32_t)0x00000028UL)
 107 #define MXC_R_AES_MEM_OFFS_KEY7                   ((uint32_t)0x0000002CUL)
 108 #define MXC_R_AES_MEM_OFFS_OUT0                   ((uint32_t)0x00000030UL)
 109 #define MXC_R_AES_MEM_OFFS_OUT1                   ((uint32_t)0x00000034UL)
 110 #define MXC_R_AES_MEM_OFFS_OUT2                   ((uint32_t)0x00000038UL)
 111 #define MXC_R_AES_MEM_OFFS_OUT3                   ((uint32_t)0x0000003CUL)
 112 #define MXC_R_AES_MEM_OFFS_EXPKEY0                ((uint32_t)0x00000040UL)
 113 #define MXC_R_AES_MEM_OFFS_EXPKEY1                ((uint32_t)0x00000044UL)
 114 #define MXC_R_AES_MEM_OFFS_EXPKEY2                ((uint32_t)0x00000048UL)
 115 #define MXC_R_AES_MEM_OFFS_EXPKEY3                ((uint32_t)0x0000004CUL)
 116 #define MXC_R_AES_MEM_OFFS_EXPKEY4                ((uint32_t)0x00000050UL)
 117 #define MXC_R_AES_MEM_OFFS_EXPKEY5                ((uint32_t)0x00000054UL)
 118 #define MXC_R_AES_MEM_OFFS_EXPKEY6                ((uint32_t)0x00000058UL)
 119 #define MXC_R_AES_MEM_OFFS_EXPKEY7                ((uint32_t)0x0000005CUL)
 120
 121 #define MXC_F_AES_CTRL_START_POS                  0
 122 #define MXC_F_AES_CTRL_START                      ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_START_POS))
 123 #define MXC_F_AES_CTRL_CRYPT_MODE_POS             1
 124 #define MXC_F_AES_CTRL_CRYPT_MODE                 ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_CRYPT_MODE_POS))
 125 #define MXC_F_AES_CTRL_EXP_KEY_MODE_POS           2
 126 #define MXC_F_AES_CTRL_EXP_KEY_MODE               ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
 127 #define MXC_F_AES_CTRL_KEY_SIZE_POS               3
 128 #define MXC_F_AES_CTRL_KEY_SIZE                   ((uint32_t)(0x00000003UL << MXC_F_AES_CTRL_KEY_SIZE_POS))
 129 #define MXC_F_AES_CTRL_INTEN_POS                  5
 130 #define MXC_F_AES_CTRL_INTEN                      ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_INTEN_POS))
 131 #define MXC_F_AES_CTRL_INTFL_POS                  6
 132 #define MXC_F_AES_CTRL_INTFL                      ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_INTFL_POS))
 133
 134 #define MXC_V_AES_CTRL_ENCRYPT_MODE               0
 135 #define MXC_V_AES_CTRL_DECRYPT_MODE               1
 136 #define MXC_S_AES_CTRL_ENCRYPT_MODE               ((uint32_t)(MXC_V_AES_CTRL_ENCRYPT_MODE << MXC_F_AES_CTRL_CRYPT_MODE_POS))
 137 #define MXC_S_AES_CTRL_DECRYPT_MODE               ((uint32_t)(MXC_V_AES_CTRL_DECRYPT_MODE << MXC_F_AES_CTRL_CRYPT_MODE_POS))
 138
 139 #define MXC_V_AES_CTRL_CALC_NEW_EXP_KEY           0
 140 #define MXC_V_AES_CTRL_USE_LAST_EXP_KEY           1
 141 #define MXC_S_AES_CTRL_CALC_NEW_EXP_KEY           ((uint32_t)(MXC_V_AES_CTRL_CALC_NEW_EXP_KEY << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
 142 #define MXC_S_AES_CTRL_USE_LAST_EXP_KEY           ((uint32_t)(MXC_V_AES_CTRL_USE_LAST_EXP_KEY << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
 143
 144 #define MXC_V_AES_CTRL_KEY_SIZE_128               0
 145 #define MXC_V_AES_CTRL_KEY_SIZE_192               1
 146 #define MXC_V_AES_CTRL_KEY_SIZE_256               2
 147 #define MXC_S_AES_CTRL_KEY_SIZE_128               ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_128 << MXC_F_AES_CTRL_KEY_SIZE_POS))
 148 #define MXC_S_AES_CTRL_KEY_SIZE_192               ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_192 << MXC_F_AES_CTRL_KEY_SIZE_POS))
 149 #define MXC_S_AES_CTRL_KEY_SIZE_256               ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_256 << MXC_F_AES_CTRL_KEY_SIZE_POS))
 150
 151 #ifdef __cplusplus
 152 }
 153 #endif
 154
 155 /**
 156 * @}
 157 */
 158
 159 #endif   /* _MXC_AES_REGS_H_ */