tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/afe_regs.h

   1 /*******************************************************************************
   2  * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  16  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  17  * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
  18  * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Except as contained in this notice, the name of Maxim Integrated
  23  * Products, Inc. shall not be used except as stated in the Maxim Integrated
  24  * Products, Inc. Branding Policy.
  25  *
  26  * The mere transfer of this software does not imply any licenses
  27  * of trade secrets, proprietary technology, copyrights, patents,
  28  * trademarks, maskwork rights, or any other form of intellectual
  29  * property whatsoever. Maxim Integrated Products, Inc. retains all
  30  * ownership rights.
  31  *******************************************************************************
  32  */
  33
  34 #ifndef _MXC_AFE_REGS_H
  35 #define _MXC_AFE_REGS_H
  36
  37 #ifdef __cplusplus
  38 extern "C" {
  39 #endif
  40
  41 #include <stdint.h>
  42
  43 /**
  44  * @file  afe_regs.h
  45  * @addtogroup afe AFE
  46  * @{
  47  */
  48
  49 /**
  50  * @brief Defines Configure Options for the LED Ports.
  51  */
  52 typedef enum {
  53     /** LED Sink Port 0 with OpAmp A, LED Sink Port 1 with OpAmp C */
  54     MXC_E_AFE_LED_CFG_PORT_OPAMP_A_C = 0,
  55     /** LED Sink Port 0 with OpAmp B, LED Sink Port 1 with OpAmp D */
  56     MXC_E_AFE_LED_CFG_PORT_OPAMP_B_D,
  57     /** Disable LED Sink Port 0,Disable LED Sink Port 1 */
  58     MXC_E_AFE_LED_CFG_PORT_DISABLED,
  59 } mxc_afe_led_cfg_port_t;
  60
  61 /**
  62  * @brief Setup of Wake Up Detector for LPCs.
  63  */
  64 typedef enum {
  65     /** IDLE */
  66     MXC_E_AFE_EN_WUD_COMP_IDLE = 0,
  67     /** Activate WUD for falling edges */
  68     MXC_E_AFE_EN_WUD_COMP_FALLING_EDGE = 2,
  69     /** Activate WUD for rising edges */
  70     MXC_E_AFE_EN_WUD_COMP_RISING_EDGE = 3
  71 } mxc_afe_en_wud_comp_t;
  72
  73 /**
  74  * @brief LPC InMode.
  75  */
  76 typedef enum {
  77     /** InMode: both Nch and Pch */
  78     MXC_E_AFE_IN_MODE_COMP_NCH_PCH = 0,
  79     /** InMode: only Nch  */
  80     MXC_E_AFE_IN_MODE_COMP_NCH,
  81     /** InMode: only Pch  */
  82     MXC_E_AFE_IN_MODE_COMP_PCH,
  83 } mxc_afe_in_mode_comp_t;
  84
  85 /**
  86  * @brief LPC Bias.
  87  */
  88 typedef enum {
  89     /** BIAS 0.52uA Delay 4.0us  */
  90     MXC_E_AFE_BIAS_MODE_COMP_0 = 0,
  91     /** BIAS 1.4uA Delay 1.7us  */
  92     MXC_E_AFE_BIAS_MODE_COMP_1,
  93     /** BIAS 2.8uA Delay 1.1us  */
  94     MXC_E_AFE_BIAS_MODE_COMP_2,
  95     /** BIAS 5.1uA Delay 0.7us  */
  96     MXC_E_AFE_BIAS_MODE_COMP_3
  97 } mxc_afe_bias_mode_comp_t;
  98
  99 /**
 100  * @brief TMON Current Value.
 101  */
 102 typedef enum {
 103     /** TMON Current 4uA  */
 104     MXC_E_AFE_TMON_CURRENT_VAL_0 = 0,
 105     /** TMON Current 60uA  */
 106     MXC_E_AFE_TMON_CURRENT_VAL_1,
 107     /** TMON Current 64uA  */
 108     MXC_E_AFE_TMON_CURRENT_VAL_2,
 109     /** TMON Current 120uA  */
 110     MXC_E_AFE_TMON_CURRENT_VAL_3
 111 } mxc_afe_tmon_current_t;
 112
 113 /**
 114  * @brief REFADC and REFDAC Voltage Select.
 115  */
 116 typedef enum {
 117     /** Voltage Reference = 1.024 V */
 118     MXC_E_AFE_REF_VOLT_SEL_1024 = 0,
 119     /** Voltage Reference = 1.5 V */
 120     MXC_E_AFE_REF_VOLT_SEL_1500,
 121     /** Voltage Reference = 2.048 V */
 122     MXC_E_AFE_REF_VOLT_SEL_2048,
 123     /** Voltage Reference = 2.5 V */
 124     MXC_E_AFE_REF_VOLT_SEL_2500
 125 } mxc_afe_ref_volt_sel_t;
 126
 127 /**
 128  * @brief Selection for DAC VOltage Reference, REFADC or REFDAC.
 129  */
 130 typedef enum {
 131     /** DAC Voltage Reference = REFADC */
 132     MXC_E_AFE_DAC_REF_REFADC = 0,
 133     /** DAC Voltage Reference = REFDAC */
 134     MXC_E_AFE_DAC_REF_REFDAC
 135 } mxc_afe_dac_ref_t;
 136
 137 /**
 138  * @brief Selection for LPC Hysteresis.
 139  */
 140 typedef enum {
 141     /** LPC Hysteresis = 0 mV */
 142     MXC_E_AFE_HYST_COMP_0 = 0,
 143     /** LPC Hysteresis = 7.5 mV */
 144     MXC_E_AFE_HYST_COMP_1,
 145     /** LPC Hysteresis = 15 mV */
 146     MXC_E_AFE_HYST_COMP_2,
 147     /** LPC Hysteresis = 30 mV */
 148     MXC_E_AFE_HYST_COMP_3
 149 } mxc_afe_hyst_comp_t;
 150
 151 /**
 152  * @brief Selection for MUX for  SCM_or_sel.
 153  */
 154 typedef enum {
 155     /** SCM_or = HIZ */
 156     MXC_E_AFE_SCM_OR_SEL_HIZ = 0,
 157     /** SCM_or = SCM0 */
 158     MXC_E_AFE_SCM_OR_SEL_SCM0,
 159     /** SCM_or = SCM1 */
 160     MXC_E_AFE_SCM_OR_SEL_SCM1,
 161     /** SCM_or = SCM2 */
 162     MXC_E_AFE_SCM_OR_SEL_SCM2,
 163     /** SCM_or = SCM3 */
 164     MXC_E_AFE_SCM_OR_SEL_SCM3
 165 } mxc_afe_scm_or_sel_t;
 166
 167 /**
 168  * @brief Selection for MUX for  SNO_or_sel.
 169  */
 170 typedef enum {
 171     /** SNO_or = HIZ */
 172     MXC_E_AFE_SNO_OR_SEL_HIZ = 0,
 173     /** SNO_or = SNO0 */
 174     MXC_E_AFE_SNO_OR_SEL_SNO0,
 175     /** SNO_or = SNO1 */
 176     MXC_E_AFE_SNO_OR_SEL_SNO1,
 177     /** SNO_or = SNO2 */
 178     MXC_E_AFE_SNO_OR_SEL_SNO2,
 179     /** SNO_or = SNO3 */
 180     MXC_E_AFE_SNO_OR_SEL_SNO3
 181 } mxc_afe_sno_or_sel_t;
 182
 183 /**
 184  * @brief Selection for MUX  DACx_sel.
 185  */
 186 typedef enum {
 187     /** dacx  = DACOP */
 188     MXC_E_AFE_DACX_SEL_P = 0,
 189     /** dacx  = DACON */
 190     MXC_E_AFE_DACX_SEL_N
 191 } mxc_afe_dacx_sel_t;
 192
 193 /**
 194  * @brief Selection for state of Switch.
 195  */
 196 typedef enum {
 197     /** Switch is OPEN */
 198     MXC_E_AFE_CLOSE_SPST_SWITCH_OPEN = 0,
 199     /** Switch is CLOSED */
 200     MXC_E_AFE_CLOSE_SPST_SWITCH_CLOSE
 201 } mxc_afe_close_spst_t;
 202
 203 /**
 204  * @brief Switch to Connect Positive Pad to GND.
 205  */
 206 typedef enum {
 207     /** Positive Pad GND Switch OPEN */
 208     MXC_E_AFE_GND_SEL_OPAMP_SWITCH_OPEN = 0,
 209     /** Positive Pad GND Switch CLOSED */
 210     MXC_E_AFE_GND_SEL_OPAMP_SWITCH_CLOSED
 211 } mxc_afe_gnd_sel_opamp_t;
 212
 213 /**
 214  * @brief MUX Selection for OpPsel.
 215  */
 216 typedef enum {
 217     /** OpPsel = INx+ */
 218     MXC_E_AFE_P_IN_SEL_OPAMP_INPLUS = 0,
 219     /** OpPsel = DAC_or */
 220     MXC_E_AFE_P_IN_SEL_OPAMP_DAC_OR,
 221     /** OpPsel = SNO_or */
 222     MXC_E_AFE_P_IN_SEL_OPAMP_SNO_OR,
 223     /** OpPsel = DAC_or also output on INx+ */
 224     MXC_E_AFE_P_IN_SEL_OPAMP_DAC_OR_AND_INPLUS
 225 } mxc_afe_p_in_sel_opamp_t;
 226
 227 /**
 228  * @brief MUX Selection for OpNsel.
 229  */
 230 typedef enum {
 231     /** OpNsel = INx- */
 232     MXC_E_AFE_N_IN_SEL_OPAMP_INMINUS = 0,
 233     /** OpNsel = OUTx */
 234     MXC_E_AFE_N_IN_SEL_OPAMP_OUT,
 235     /** OpNsel = SCM_or */
 236     MXC_E_AFE_N_IN_SEL_OPAMP_SCM_OR,
 237     /**OpNsel = SCM_or also output on INx- */
 238     MXC_E_AFE_N_IN_SEL_OPAMP_SCM_OR_AND_INMINUS,
 239 } mxc_afe_n_in_sel_opamp_t;
 240
 241 /**
 242  * @brief MUX Selection for DAC_sel.
 243  */
 244 typedef enum {
 245     /** DAC_or = DAC0 */
 246     MXC_E_AFE_DAC_SEL_DAC0 = 0,
 247     /** DAC_or = DAC1 */
 248     MXC_E_AFE_DAC_SEL_DAC1,
 249     /** DAC_or = DAC2P */
 250     MXC_E_AFE_DAC_SEL_DAC2P,
 251     /** DAC_or = DAC3P */
 252     MXC_E_AFE_DAC_SEL_DAC3P
 253 } mxc_afe_dac_sel_t;
 254
 255 /**
 256  * @brief MUX Selection for NPAD_sel.
 257  */
 258 typedef enum {
 259     /** NPAD_Sel = HIZ */
 260     MXC_E_AFE_NPAD_SEL_HIZ = 0,
 261     /** NPAD_Sel = LED Observe Port */
 262     MXC_E_AFE_NPAD_SEL_LED_OBS_PORT,
 263     /** NPAD_Sel = DAC_or */
 264     MXC_E_AFE_NPAD_SEL_DAC_OR,
 265     /** NPAD_Sel = DAC_or and LED Observe Port */
 266     MXC_E_AFE_NPAD_SEL_DAC_OR_AND_LED_OBS_PORT
 267 } mxc_afe_npad_sel_t;
 268
 269 /**
 270  * @brief MUX Selection for CmpPSel.
 271  */
 272 typedef enum {
 273     /** CmpPSel = INx+ */
 274     MXC_E_AFE_POS_IN_SEL_COMP_INPLUS = 0,
 275     /** CmpPSel = SCM */
 276     MXC_E_AFE_POS_IN_SEL_COMP_SCM,
 277     /** CmpPSel = dac1 */
 278     MXC_E_AFE_POS_IN_SEL_COMP_DAC1,
 279     /** CmpPSel = DAC3P */
 280     MXC_E_AFE_POS_IN_SEL_COMP_DAC3P,
 281     /** CmpPSel = LED Observe Port */
 282     MXC_E_AFE_POS_IN_SEL_COMP_LED_OBS_PORT,
 283     /** CmpPSel = dac1 also output on INx+ */
 284     MXC_E_AFE_POS_IN_SEL_COMP_DAC1_AND_INPLUS,
 285     /** CmpPSel = DAC3P also output on INx+ */
 286     MXC_E_AFE_POS_IN_SEL_COMP_DAC3P_AND_INPLUS,
 287     /** CmpPSel = dac1 also output on SCM */
 288     MXC_E_AFE_POS_IN_SEL_COMP_DAC1_AND_SCM
 289 } mxc_afe_pos_in_sel_comp_t;
 290
 291 /**
 292  * @brief MUX Selection for CmpNSel.
 293  */
 294 typedef enum {
 295     /** CmpNSel = INx- */
 296     MXC_E_AFE_NEG_IN_SEL_COMP_INMINUS = 0,
 297     /** CmpNSel = SNO */
 298     MXC_E_AFE_NEG_IN_SEL_COMP_SNO,
 299     /** CmpNSel = dac0 */
 300     MXC_E_AFE_NEG_IN_SEL_COMP_DAC0,
 301     /** CmpNSel = DAC2P */
 302     MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P,
 303     /** CmpNSel = LED Observation Port */
 304     MXC_E_AFE_NEG_IN_SEL_COMP_LED_OBS_PORT,
 305     /** CmpNSel = dac0 also output on INx- */
 306     MXC_E_AFE_NEG_IN_SEL_COMP_DAC0_AND_INMINUS,
 307     /** CmpNSel = DAC2 also output on INx- */
 308     MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P_AND_INMINUS,
 309     /** CmpNSel = DAC2 also output on SNO */
 310     MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P_AND_SNO
 311 } mxc_afe_neg_in_sel_comp_t;
 312
 313 /*                                      Offset   Register Description
 314                                         ======   ==================================================== */
 315 typedef struct {
 316     __IO uint32_t intr;             /*  0x0000   Analog Front End Interrupt Flags and Enable/Disable  */
 317     __IO uint32_t ctrl0;            /*  0x0004   Analog Front End Control 0                           */
 318     __IO uint32_t ctrl1;            /*  0x0008   Analog Front End Control 1                           */
 319     __IO uint32_t ctrl2;            /*  0x000C   Analog Front End Control 2                           */
 320     __IO uint32_t ctrl3;            /*  0x0010   Analog Front End Control 3                           */
 321     __IO uint32_t ctrl4;            /*  0x0014   Analog Front End Control 4                           */
 322     __IO uint32_t ctrl5;            /*  0x0018   Analog Front End Control 5                           */
 323 } mxc_afe_regs_t;
 324
 325 /*
 326    Register offsets for module AFE.
 327 */
 328 #define MXC_R_AFE_OFFS_INTR                   ((uint32_t)0x00000000UL)
 329 #define MXC_R_AFE_OFFS_CTRL0                  ((uint32_t)0x00000004UL)
 330 #define MXC_R_AFE_OFFS_CTRL1                  ((uint32_t)0x00000008UL)
 331 #define MXC_R_AFE_OFFS_CTRL2                  ((uint32_t)0x0000000CUL)
 332 #define MXC_R_AFE_OFFS_CTRL3                  ((uint32_t)0x00000010UL)
 333 #define MXC_R_AFE_OFFS_CTRL4                  ((uint32_t)0x00000014UL)
 334 #define MXC_R_AFE_OFFS_CTRL5                  ((uint32_t)0x00000018UL)
 335
 336 /*
 337    Field positions and masks for module AFE.
 338 */
 339 #define MXC_F_AFE_INTR_OP_COMP0_IF_POS                      0
 340 #define MXC_F_AFE_INTR_OP_COMP0_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_IF_POS))
 341 #define MXC_F_AFE_INTR_OP_COMP1_IF_POS                      1
 342 #define MXC_F_AFE_INTR_OP_COMP1_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_IF_POS))
 343 #define MXC_F_AFE_INTR_OP_COMP2_IF_POS                      2
 344 #define MXC_F_AFE_INTR_OP_COMP2_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_IF_POS))
 345 #define MXC_F_AFE_INTR_OP_COMP3_IF_POS                      3
 346 #define MXC_F_AFE_INTR_OP_COMP3_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_IF_POS))
 347 #define MXC_F_AFE_INTR_LP_COMP0_IF_POS                      4
 348 #define MXC_F_AFE_INTR_LP_COMP0_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_IF_POS))
 349 #define MXC_F_AFE_INTR_LP_COMP1_IF_POS                      5
 350 #define MXC_F_AFE_INTR_LP_COMP1_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_IF_POS))
 351 #define MXC_F_AFE_INTR_LP_COMP2_IF_POS                      6
 352 #define MXC_F_AFE_INTR_LP_COMP2_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_IF_POS))
 353 #define MXC_F_AFE_INTR_LP_COMP3_IF_POS                      7
 354 #define MXC_F_AFE_INTR_LP_COMP3_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_IF_POS))
 355 #define MXC_F_AFE_INTR_OP_COMP0_NMI_PMU_POS                 8
 356 #define MXC_F_AFE_INTR_OP_COMP0_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_NMI_PMU_POS))
 357 #define MXC_F_AFE_INTR_OP_COMP1_NMI_PMU_POS                 9
 358 #define MXC_F_AFE_INTR_OP_COMP1_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_NMI_PMU_POS))
 359 #define MXC_F_AFE_INTR_OP_COMP2_NMI_PMU_POS                 10
 360 #define MXC_F_AFE_INTR_OP_COMP2_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_NMI_PMU_POS))
 361 #define MXC_F_AFE_INTR_OP_COMP3_NMI_PMU_POS                 11
 362 #define MXC_F_AFE_INTR_OP_COMP3_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_NMI_PMU_POS))
 363 #define MXC_F_AFE_INTR_LP_COMP0_NMI_PMU_POS                 12
 364 #define MXC_F_AFE_INTR_LP_COMP0_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_NMI_PMU_POS))
 365 #define MXC_F_AFE_INTR_LP_COMP1_NMI_PMU_POS                 13
 366 #define MXC_F_AFE_INTR_LP_COMP1_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_NMI_PMU_POS))
 367 #define MXC_F_AFE_INTR_LP_COMP2_NMI_PMU_POS                 14
 368 #define MXC_F_AFE_INTR_LP_COMP2_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_NMI_PMU_POS))
 369 #define MXC_F_AFE_INTR_LP_COMP3_NMI_PMU_POS                 15
 370 #define MXC_F_AFE_INTR_LP_COMP3_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_NMI_PMU_POS))
 371 #define MXC_F_AFE_INTR_OP_COMP0_POL_POS                     16
 372 #define MXC_F_AFE_INTR_OP_COMP0_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_POL_POS))
 373 #define MXC_F_AFE_INTR_OP_COMP1_POL_POS                     17
 374 #define MXC_F_AFE_INTR_OP_COMP1_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_POL_POS))
 375 #define MXC_F_AFE_INTR_OP_COMP2_POL_POS                     18
 376 #define MXC_F_AFE_INTR_OP_COMP2_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_POL_POS))
 377 #define MXC_F_AFE_INTR_OP_COMP3_POL_POS                     19
 378 #define MXC_F_AFE_INTR_OP_COMP3_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_POL_POS))
 379 #define MXC_F_AFE_INTR_LP_COMP0_POL_POS                     20
 380 #define MXC_F_AFE_INTR_LP_COMP0_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_POL_POS))
 381 #define MXC_F_AFE_INTR_LP_COMP1_POL_POS                     21
 382 #define MXC_F_AFE_INTR_LP_COMP1_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_POL_POS))
 383 #define MXC_F_AFE_INTR_LP_COMP2_POL_POS                     22
 384 #define MXC_F_AFE_INTR_LP_COMP2_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_POL_POS))
 385 #define MXC_F_AFE_INTR_LP_COMP3_POL_POS                     23
 386 #define MXC_F_AFE_INTR_LP_COMP3_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_POL_POS))
 387 #define MXC_F_AFE_INTR_OP_COMP0_IE_POS                      24
 388 #define MXC_F_AFE_INTR_OP_COMP0_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_IE_POS))
 389 #define MXC_F_AFE_INTR_OP_COMP1_IE_POS                      25
 390 #define MXC_F_AFE_INTR_OP_COMP1_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_IE_POS))
 391 #define MXC_F_AFE_INTR_OP_COMP2_IE_POS                      26
 392 #define MXC_F_AFE_INTR_OP_COMP2_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_IE_POS))
 393 #define MXC_F_AFE_INTR_OP_COMP3_IE_POS                      27
 394 #define MXC_F_AFE_INTR_OP_COMP3_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_IE_POS))
 395 #define MXC_F_AFE_INTR_LP_COMP0_IE_POS                      28
 396 #define MXC_F_AFE_INTR_LP_COMP0_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_IE_POS))
 397 #define MXC_F_AFE_INTR_LP_COMP1_IE_POS                      29
 398 #define MXC_F_AFE_INTR_LP_COMP1_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_IE_POS))
 399 #define MXC_F_AFE_INTR_LP_COMP2_IE_POS                      30
 400 #define MXC_F_AFE_INTR_LP_COMP2_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_IE_POS))
 401 #define MXC_F_AFE_INTR_LP_COMP3_IE_POS                      31
 402 #define MXC_F_AFE_INTR_LP_COMP3_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_IE_POS))
 403
 404 #define MXC_F_AFE_CTRL0_LED_CFG_POS                         0
 405 #define MXC_F_AFE_CTRL0_LED_CFG                             ((uint32_t)(0x0000000FUL << MXC_F_AFE_CTRL0_LED_CFG_POS))
 406 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0_POS                 4
 407 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0_POS))
 408 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1_POS                 5
 409 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1_POS))
 410 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2_POS                 6
 411 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2_POS))
 412 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3_POS                 7
 413 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3_POS))
 414 #define MXC_F_AFE_CTRL0_EN_WUD_COMP0_POS                    8
 415 #define MXC_F_AFE_CTRL0_EN_WUD_COMP0                        ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP0_POS))
 416 #define MXC_F_AFE_CTRL0_EN_WUD_COMP1_POS                    10
 417 #define MXC_F_AFE_CTRL0_EN_WUD_COMP1                        ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP1_POS))
 418 #define MXC_F_AFE_CTRL0_EN_WUD_COMP2_POS                    12
 419 #define MXC_F_AFE_CTRL0_EN_WUD_COMP2                        ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP2_POS))
 420 #define MXC_F_AFE_CTRL0_EN_WUD_COMP3_POS                    14
 421 #define MXC_F_AFE_CTRL0_EN_WUD_COMP3                        ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP3_POS))
 422 #define MXC_F_AFE_CTRL0_IN_MODE_COMP0_POS                   16
 423 #define MXC_F_AFE_CTRL0_IN_MODE_COMP0                       ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP0_POS))
 424 #define MXC_F_AFE_CTRL0_IN_MODE_COMP1_POS                   18
 425 #define MXC_F_AFE_CTRL0_IN_MODE_COMP1                       ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP1_POS))
 426 #define MXC_F_AFE_CTRL0_IN_MODE_COMP2_POS                   20
 427 #define MXC_F_AFE_CTRL0_IN_MODE_COMP2                       ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP2_POS))
 428 #define MXC_F_AFE_CTRL0_IN_MODE_COMP3_POS                   22
 429 #define MXC_F_AFE_CTRL0_IN_MODE_COMP3                       ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP3_POS))
 430 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP0_POS                 24
 431 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP0                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP0_POS))
 432 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP1_POS                 26
 433 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP1                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP1_POS))
 434 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP2_POS                 28
 435 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP2                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP2_POS))
 436 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP3_POS                 30
 437 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP3                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP3_POS))
 438
 439 #define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN_POS           0
 440 #define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN               ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN_POS))
 441 #define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL_POS          1
 442 #define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL              ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL_POS))
 443 #define MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN_POS           3
 444 #define MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN               ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN_POS))
 445 #define MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN_POS           4
 446 #define MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN               ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN_POS))
 447 #define MXC_F_AFE_CTRL1_REF_BANDGAP_SEL_POS                 5
 448 #define MXC_F_AFE_CTRL1_REF_BANDGAP_SEL                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_BANDGAP_SEL_POS))
 449 #define MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS                6
 450 #define MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL                    ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS))
 451 #define MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL_POS                8
 452 #define MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL                    ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL_POS))
 453 #define MXC_F_AFE_CTRL1_REF_SEL_POS                         10
 454 #define MXC_F_AFE_CTRL1_REF_SEL                             ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_SEL_POS))
 455 #define MXC_F_AFE_CTRL1_REF_ADC_POWERUP_POS                 11
 456 #define MXC_F_AFE_CTRL1_REF_ADC_POWERUP                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_POWERUP_POS))
 457 #define MXC_F_AFE_CTRL1_REF_DAC_POWERUP_POS                 12
 458 #define MXC_F_AFE_CTRL1_REF_DAC_POWERUP                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_POWERUP_POS))
 459 #define MXC_F_AFE_CTRL1_REF_BLK_POWERUP_POS                 13
 460 #define MXC_F_AFE_CTRL1_REF_BLK_POWERUP                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_BLK_POWERUP_POS))
 461 #define MXC_F_AFE_CTRL1_REF_ADC_COMP_POS                    14
 462 #define MXC_F_AFE_CTRL1_REF_ADC_COMP                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_COMP_POS))
 463 #define MXC_F_AFE_CTRL1_REF_DAC_COMP_POS                    15
 464 #define MXC_F_AFE_CTRL1_REF_DAC_COMP                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_COMP_POS))
 465 #define MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN_POS               16
 466 #define MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN                   ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN_POS))
 467 #define MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN_POS               18
 468 #define MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN                   ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN_POS))
 469 #define MXC_F_AFE_CTRL1_ABUS_PAGE_2_0_POS                   20
 470 #define MXC_F_AFE_CTRL1_ABUS_PAGE_2_0                       ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL1_ABUS_PAGE_2_0_POS))
 471 #define MXC_F_AFE_CTRL1_PLL_TST_EN_POS                      23
 472 #define MXC_F_AFE_CTRL1_PLL_TST_EN                          ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_PLL_TST_EN_POS))
 473 #define MXC_F_AFE_CTRL1_V1EXTADJ_POS                        25
 474 #define MXC_F_AFE_CTRL1_V1EXTADJ                            ((uint32_t)(0x0000001FUL << MXC_F_AFE_CTRL1_V1EXTADJ_POS))
 475 #define MXC_F_AFE_CTRL1_TMON_CUR_SEL_POS                    30
 476 #define MXC_F_AFE_CTRL1_TMON_CUR_SEL                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_TMON_CUR_SEL_POS))
 477
 478 #define MXC_F_AFE_CTRL2_HYST_COMP0_POS                      0
 479 #define MXC_F_AFE_CTRL2_HYST_COMP0                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP0_POS))
 480 #define MXC_F_AFE_CTRL2_HYST_COMP1_POS                      2
 481 #define MXC_F_AFE_CTRL2_HYST_COMP1                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP1_POS))
 482 #define MXC_F_AFE_CTRL2_HYST_COMP2_POS                      4
 483 #define MXC_F_AFE_CTRL2_HYST_COMP2                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP2_POS))
 484 #define MXC_F_AFE_CTRL2_HYST_COMP3_POS                      6
 485 #define MXC_F_AFE_CTRL2_HYST_COMP3                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP3_POS))
 486 #define MXC_F_AFE_CTRL2_HY_POL_COMP0_POS                    8
 487 #define MXC_F_AFE_CTRL2_HY_POL_COMP0                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP0_POS))
 488 #define MXC_F_AFE_CTRL2_HY_POL_COMP1_POS                    9
 489 #define MXC_F_AFE_CTRL2_HY_POL_COMP1                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP1_POS))
 490 #define MXC_F_AFE_CTRL2_HY_POL_COMP2_POS                    10
 491 #define MXC_F_AFE_CTRL2_HY_POL_COMP2                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP2_POS))
 492 #define MXC_F_AFE_CTRL2_HY_POL_COMP3_POS                    11
 493 #define MXC_F_AFE_CTRL2_HY_POL_COMP3                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP3_POS))
 494 #define MXC_F_AFE_CTRL2_POWERUP_COMP0_POS                   12
 495 #define MXC_F_AFE_CTRL2_POWERUP_COMP0                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP0_POS))
 496 #define MXC_F_AFE_CTRL2_POWERUP_COMP1_POS                   13
 497 #define MXC_F_AFE_CTRL2_POWERUP_COMP1                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP1_POS))
 498 #define MXC_F_AFE_CTRL2_POWERUP_COMP2_POS                   14
 499 #define MXC_F_AFE_CTRL2_POWERUP_COMP2                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP2_POS))
 500 #define MXC_F_AFE_CTRL2_POWERUP_COMP3_POS                   15
 501 #define MXC_F_AFE_CTRL2_POWERUP_COMP3                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP3_POS))
 502 #define MXC_F_AFE_CTRL2_DACOUT_EN0_POS                      16
 503 #define MXC_F_AFE_CTRL2_DACOUT_EN0                          ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN0_POS))
 504 #define MXC_F_AFE_CTRL2_DACOUT_EN1_POS                      17
 505 #define MXC_F_AFE_CTRL2_DACOUT_EN1                          ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN1_POS))
 506 #define MXC_F_AFE_CTRL2_DACOUT_EN2_POS                      18
 507 #define MXC_F_AFE_CTRL2_DACOUT_EN2                          ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN2_POS))
 508 #define MXC_F_AFE_CTRL2_DACOUT_EN3_POS                      19
 509 #define MXC_F_AFE_CTRL2_DACOUT_EN3                          ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN3_POS))
 510 #define MXC_F_AFE_CTRL2_SCM_OR_SEL_POS                      20
 511 #define MXC_F_AFE_CTRL2_SCM_OR_SEL                          ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL2_SCM_OR_SEL_POS))
 512 #define MXC_F_AFE_CTRL2_SNO_OR_SEL_POS                      23
 513 #define MXC_F_AFE_CTRL2_SNO_OR_SEL                          ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL2_SNO_OR_SEL_POS))
 514 #define MXC_F_AFE_CTRL2_DAC0_SEL_POS                        26
 515 #define MXC_F_AFE_CTRL2_DAC0_SEL                            ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DAC0_SEL_POS))
 516 #define MXC_F_AFE_CTRL2_DAC1_SEL_POS                        27
 517 #define MXC_F_AFE_CTRL2_DAC1_SEL                            ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DAC1_SEL_POS))
 518
 519 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP0_POS                  12
 520 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP0                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP0_POS))
 521 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP1_POS                  13
 522 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP1                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP1_POS))
 523 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP2_POS                  14
 524 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP2                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP2_POS))
 525 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP3_POS                  15
 526 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP3                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP3_POS))
 527 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP0_POS                  16
 528 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP0                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP0_POS))
 529 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP1_POS                  17
 530 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP1                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP1_POS))
 531 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP2_POS                  18
 532 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP2                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP2_POS))
 533 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP3_POS                  19
 534 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP3                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP3_POS))
 535 #define MXC_F_AFE_CTRL3_CLOSE_SPST0_POS                     20
 536 #define MXC_F_AFE_CTRL3_CLOSE_SPST0                         ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST0_POS))
 537 #define MXC_F_AFE_CTRL3_CLOSE_SPST1_POS                     21
 538 #define MXC_F_AFE_CTRL3_CLOSE_SPST1                         ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST1_POS))
 539 #define MXC_F_AFE_CTRL3_CLOSE_SPST2_POS                     22
 540 #define MXC_F_AFE_CTRL3_CLOSE_SPST2                         ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST2_POS))
 541 #define MXC_F_AFE_CTRL3_CLOSE_SPST3_POS                     23
 542 #define MXC_F_AFE_CTRL3_CLOSE_SPST3                         ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST3_POS))
 543 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP0_POS                   24
 544 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP0                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP0_POS))
 545 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP1_POS                   25
 546 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP1                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP1_POS))
 547 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP2_POS                   26
 548 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP2                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP2_POS))
 549 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP3_POS                   27
 550 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP3                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP3_POS))
 551 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP0_POS                   28
 552 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP0                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP0_POS))
 553 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP1_POS                   29
 554 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP1                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP1_POS))
 555 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP2_POS                   30
 556 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP2                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP2_POS))
 557 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP3_POS                   31
 558 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP3                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP3_POS))
 559
 560 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0_POS                 0
 561 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0_POS))
 562 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1_POS                 2
 563 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1_POS))
 564 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2_POS                 4
 565 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2_POS))
 566 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3_POS                 6
 567 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3_POS))
 568 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0_POS                 8
 569 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0_POS))
 570 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1_POS                 10
 571 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1_POS))
 572 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2_POS                 12
 573 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2_POS))
 574 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3_POS                 14
 575 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3_POS))
 576 #define MXC_F_AFE_CTRL4_DAC_SEL_A_POS                       16
 577 #define MXC_F_AFE_CTRL4_DAC_SEL_A                           ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_A_POS))
 578 #define MXC_F_AFE_CTRL4_DAC_SEL_B_POS                       18
 579 #define MXC_F_AFE_CTRL4_DAC_SEL_B                           ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_B_POS))
 580 #define MXC_F_AFE_CTRL4_DAC_SEL_C_POS                       20
 581 #define MXC_F_AFE_CTRL4_DAC_SEL_C                           ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_C_POS))
 582 #define MXC_F_AFE_CTRL4_DAC_SEL_D_POS                       22
 583 #define MXC_F_AFE_CTRL4_DAC_SEL_D                           ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_D_POS))
 584 #define MXC_F_AFE_CTRL4_NPAD_SEL_A_POS                      24
 585 #define MXC_F_AFE_CTRL4_NPAD_SEL_A                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_A_POS))
 586 #define MXC_F_AFE_CTRL4_NPAD_SEL_B_POS                      26
 587 #define MXC_F_AFE_CTRL4_NPAD_SEL_B                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_B_POS))
 588 #define MXC_F_AFE_CTRL4_NPAD_SEL_C_POS                      28
 589 #define MXC_F_AFE_CTRL4_NPAD_SEL_C                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_C_POS))
 590 #define MXC_F_AFE_CTRL4_NPAD_SEL_D_POS                      30
 591 #define MXC_F_AFE_CTRL4_NPAD_SEL_D                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_D_POS))
 592
 593 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0_POS               0
 594 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0_POS))
 595 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1_POS               3
 596 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1_POS))
 597 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2_POS               6
 598 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2_POS))
 599 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3_POS               9
 600 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3_POS))
 601 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0_POS               12
 602 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0_POS))
 603 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1_POS               15
 604 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1_POS))
 605 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2_POS               18
 606 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2_POS))
 607 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3_POS               21
 608 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3_POS))
 609 #define MXC_F_AFE_CTRL5_OP_CMP0_POS                         24
 610 #define MXC_F_AFE_CTRL5_OP_CMP0                             ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP0_POS))
 611 #define MXC_F_AFE_CTRL5_OP_CMP1_POS                         25
 612 #define MXC_F_AFE_CTRL5_OP_CMP1                             ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP1_POS))
 613 #define MXC_F_AFE_CTRL5_OP_CMP2_POS                         26
 614 #define MXC_F_AFE_CTRL5_OP_CMP2                             ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP2_POS))
 615 #define MXC_F_AFE_CTRL5_OP_CMP3_POS                         27
 616 #define MXC_F_AFE_CTRL5_OP_CMP3                             ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP3_POS))
 617
 618 #ifdef __cplusplus
 619 }
 620 #endif
 621
 622 /**
 623 * @}
 624 */
 625
 626 #endif   /* _MXC_AFE_REGS_H_ */