tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/startup_nRF51822.s

   1 ; mbed Microcontroller Library
   2 ; Copyright (c) 2013 Nordic Semiconductor.
   3 ;Licensed under the Apache License, Version 2.0 (the "License");
   4 ;you may not use this file except in compliance with the License.
   5 ;You may obtain a copy of the License at
   6 ;http://www.apache.org/licenses/LICENSE-2.0
   7 ;Unless required by applicable law or agreed to in writing, software
   8 ;distributed under the License is distributed on an "AS IS" BASIS,
   9 ;WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  10 ;See the License for the specific language governing permissions and
  11 ;limitations under the License.
  12
  13 ; Description message
  14
  15 __initial_sp    EQU     0x20004000
  16
  17
  18                 PRESERVE8
  19                 THUMB
  20
  21 ; Vector Table Mapped to Address 0 at Reset
  22
  23                 AREA    RESET, DATA, READONLY
  24                 EXPORT  __Vectors
  25                 EXPORT  __Vectors_End
  26                 EXPORT  __Vectors_Size
  27
  28 __Vectors       DCD     __initial_sp              ; Top of Stack
  29                 DCD     Reset_Handler             ; Reset Handler
  30                 DCD     NMI_Handler               ; NMI Handler
  31                 DCD     HardFault_Handler         ; Hard Fault Handler
  32                 DCD     0                         ; Reserved
  33                 DCD     0                         ; Reserved
  34                 DCD     0                         ; Reserved
  35                 DCD     0                         ; Reserved
  36                 DCD     0                         ; Reserved
  37                 DCD     0                         ; Reserved
  38                 DCD     0                         ; Reserved
  39                 DCD     SVC_Handler               ; SVCall Handler
  40                 DCD     0                         ; Reserved
  41                 DCD     0                         ; Reserved
  42                 DCD     PendSV_Handler            ; PendSV Handler
  43                 DCD     SysTick_Handler           ; SysTick Handler
  44
  45                 ; External Interrupts
  46                 DCD      POWER_CLOCK_IRQHandler ;POWER_CLOCK
  47                 DCD      RADIO_IRQHandler ;RADIO
  48                 DCD      UART0_IRQHandler ;UART0
  49                 DCD      SPI0_TWI0_IRQHandler ;SPI0_TWI0
  50                 DCD      SPI1_TWI1_IRQHandler ;SPI1_TWI1
  51                 DCD      0 ;Reserved
  52                 DCD      GPIOTE_IRQHandler ;GPIOTE
  53                 DCD      ADC_IRQHandler ;ADC
  54                 DCD      TIMER0_IRQHandler ;TIMER0
  55                 DCD      TIMER1_IRQHandler ;TIMER1
  56                 DCD      TIMER2_IRQHandler ;TIMER2
  57                 DCD      RTC0_IRQHandler ;RTC0
  58                 DCD      TEMP_IRQHandler ;TEMP
  59                 DCD      RNG_IRQHandler ;RNG
  60                 DCD      ECB_IRQHandler ;ECB
  61                 DCD      CCM_AAR_IRQHandler ;CCM_AAR
  62                 DCD      WDT_IRQHandler ;WDT
  63                 DCD      RTC1_IRQHandler ;RTC1
  64                 DCD      QDEC_IRQHandler ;QDEC
  65                 DCD      LPCOMP_COMP_IRQHandler ;LPCOMP_COMP
  66                 DCD      SWI0_IRQHandler ;SWI0
  67                 DCD      SWI1_IRQHandler ;SWI1
  68                 DCD      SWI2_IRQHandler ;SWI2
  69                 DCD      SWI3_IRQHandler ;SWI3
  70                 DCD      SWI4_IRQHandler ;SWI4
  71                 DCD      SWI5_IRQHandler ;SWI5
  72                 DCD      0 ;Reserved
  73                 DCD      0 ;Reserved
  74                 DCD      0 ;Reserved
  75                 DCD      0 ;Reserved
  76                 DCD      0 ;Reserved
  77                 DCD      0 ;Reserved
  78
  79
  80 __Vectors_End
  81
  82 __Vectors_Size  EQU     __Vectors_End - __Vectors
  83
  84                 AREA    |.text|, CODE, READONLY
  85
  86 ; Reset Handler
  87
  88 NRF_POWER_RAMON_ADDRESS           EQU   0x40000524  ; NRF_POWER->RAMON address
  89 NRF_POWER_RAMON_RAMxON_ONMODE_Msk EQU   0xF         ; All RAM blocks on in onmode bit mask
  90
  91 Reset_Handler   PROC
  92                 EXPORT  Reset_Handler             [WEAK]
  93                 IMPORT  SystemInit
  94                 IMPORT  __main
  95                 LDR     R0, =NRF_POWER_RAMON_ADDRESS
  96                 LDR     R2, [R0]
  97                 MOVS    R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
  98                 ORRS    R2, R2, R1
  99                 STR     R2, [R0]
 100                 LDR     R0, =SystemInit
 101                 BLX     R0
 102                 LDR     R0, =__main
 103                 BX      R0
 104                 ENDP
 105
 106 ; Dummy Exception Handlers (infinite loops which can be modified)
 107
 108 NMI_Handler     PROC
 109                 EXPORT  NMI_Handler               [WEAK]
 110                 B       .
 111                 ENDP
 112 HardFault_Handler\
 113                 PROC
 114                 EXPORT  HardFault_Handler         [WEAK]
 115                 B       .
 116                 ENDP
 117 SVC_Handler     PROC
 118                 EXPORT  SVC_Handler               [WEAK]
 119                 B       .
 120                 ENDP
 121 PendSV_Handler  PROC
 122                 EXPORT  PendSV_Handler            [WEAK]
 123                 B       .
 124                 ENDP
 125 SysTick_Handler PROC
 126                 EXPORT  SysTick_Handler           [WEAK]
 127                 B       .
 128                 ENDP
 129
 130 Default_Handler PROC
 131
 132                 EXPORT   POWER_CLOCK_IRQHandler [WEAK]
 133                 EXPORT   RADIO_IRQHandler [WEAK]
 134                 EXPORT   UART0_IRQHandler [WEAK]
 135                 EXPORT   SPI0_TWI0_IRQHandler [WEAK]
 136                 EXPORT   SPI1_TWI1_IRQHandler [WEAK]
 137                 EXPORT   GPIOTE_IRQHandler [WEAK]
 138                 EXPORT   ADC_IRQHandler [WEAK]
 139                 EXPORT   TIMER0_IRQHandler [WEAK]
 140                 EXPORT   TIMER1_IRQHandler [WEAK]
 141                 EXPORT   TIMER2_IRQHandler [WEAK]
 142                 EXPORT   RTC0_IRQHandler [WEAK]
 143                 EXPORT   TEMP_IRQHandler [WEAK]
 144                 EXPORT   RNG_IRQHandler [WEAK]
 145                 EXPORT   ECB_IRQHandler [WEAK]
 146                 EXPORT   CCM_AAR_IRQHandler [WEAK]
 147                 EXPORT   WDT_IRQHandler [WEAK]
 148                 EXPORT   RTC1_IRQHandler [WEAK]
 149                 EXPORT   QDEC_IRQHandler [WEAK]
 150                 EXPORT   LPCOMP_COMP_IRQHandler [WEAK]
 151                 EXPORT   SWI0_IRQHandler [WEAK]
 152                 EXPORT   SWI1_IRQHandler [WEAK]
 153                 EXPORT   SWI2_IRQHandler [WEAK]
 154                 EXPORT   SWI3_IRQHandler [WEAK]
 155                 EXPORT   SWI4_IRQHandler [WEAK]
 156                 EXPORT   SWI5_IRQHandler [WEAK]
 157 POWER_CLOCK_IRQHandler
 158 RADIO_IRQHandler
 159 UART0_IRQHandler
 160 SPI0_TWI0_IRQHandler
 161 SPI1_TWI1_IRQHandler
 162 GPIOTE_IRQHandler
 163 ADC_IRQHandler
 164 TIMER0_IRQHandler
 165 TIMER1_IRQHandler
 166 TIMER2_IRQHandler
 167 RTC0_IRQHandler
 168 TEMP_IRQHandler
 169 RNG_IRQHandler
 170 ECB_IRQHandler
 171 CCM_AAR_IRQHandler
 172 WDT_IRQHandler
 173 RTC1_IRQHandler
 174 QDEC_IRQHandler
 175 LPCOMP_COMP_IRQHandler
 176 SWI0_IRQHandler
 177 SWI1_IRQHandler
 178 SWI2_IRQHandler
 179 SWI3_IRQHandler
 180 SWI4_IRQHandler
 181 SWI5_IRQHandler
 182
 183                 B .
 184                 ENDP
 185                 ALIGN
 186                 END
 187