tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_GCC_ARM/TARGET_LPC11U68/LPC11U68.ld

   1 /*Based on following file*/
   2 /*
   3  * GENERATED FILE - DO NOT EDIT
   4  * (c) Code Red Technologies Ltd, 2008-13
   5  * (c) NXP Semiconductors 2013-2014
   6  * Generated linker script file for LPC11U68
   7  * Created from LibIncTemplate.ld (LPCXpresso v7.2 (0 [Build 153] [2014-05-19] ))
   8  * By LPCXpresso v7.2.0 [Build 153] [2014-05-19]  on Sat Jun 14 15:26:54 JST 2014
   9  */
  10
  11 MEMORY
  12 {
  13   /* Define each memory region */
  14   MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes */
  15   Ram0_32 (rwx) : ORIGIN = 0x10000000+0x100, LENGTH = 0x8000-0x100 /* 32K bytes */
  16   Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes */
  17   Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes */
  18
  19
  20 }
  21   /* Define a symbol for the top of each memory region */
  22   __top_MFlash256 = 0x0 + 0x40000;
  23   __top_Ram0_32 = 0x10000000 + 0x8000;
  24   __top_Ram1_2 = 0x20000000 + 0x800;
  25   __top_Ram2USB_2 = 0x20004000 + 0x800;
  26
  27 ENTRY(ResetISR)
  28
  29 SECTIONS
  30 {
  31
  32     /* MAIN TEXT SECTION */
  33     .text : ALIGN(4)
  34     {
  35         FILL(0xff)
  36         __vectors_start__ = ABSOLUTE(.) ;
  37         KEEP(*(.isr_vector))
  38
  39         /* Global Section Table */
  40         . = ALIGN(4) ;
  41         __section_table_start = .;
  42         __data_section_table = .;
  43         LONG(LOADADDR(.data));
  44         LONG(    ADDR(.data));
  45         LONG(  SIZEOF(.data));
  46         LONG(LOADADDR(.data_RAM2));
  47         LONG(    ADDR(.data_RAM2));
  48         LONG(  SIZEOF(.data_RAM2));
  49         LONG(LOADADDR(.data_RAM3));
  50         LONG(    ADDR(.data_RAM3));
  51         LONG(  SIZEOF(.data_RAM3));
  52         __data_section_table_end = .;
  53         __bss_section_table = .;
  54         LONG(    ADDR(.bss));
  55         LONG(  SIZEOF(.bss));
  56         LONG(    ADDR(.bss_RAM2));
  57         LONG(  SIZEOF(.bss_RAM2));
  58         LONG(    ADDR(.bss_RAM3));
  59         LONG(  SIZEOF(.bss_RAM3));
  60         __bss_section_table_end = .;
  61         __section_table_end = . ;
  62         /* End of Global Section Table */
  63
  64
  65         *(.after_vectors*)
  66
  67         *(.text*)
  68         *(.rodata .rodata.*)
  69         . = ALIGN(4);
  70
  71         /* C++ constructors etc */
  72         . = ALIGN(4);
  73         KEEP(*(.init))
  74
  75         . = ALIGN(4);
  76         __preinit_array_start = .;
  77         KEEP (*(.preinit_array))
  78         __preinit_array_end = .;
  79
  80         . = ALIGN(4);
  81         __init_array_start = .;
  82         KEEP (*(SORT(.init_array.*)))
  83         KEEP (*(.init_array))
  84         __init_array_end = .;
  85
  86         KEEP(*(.fini));
  87
  88         . = ALIGN(0x4);
  89         KEEP (*crtbegin.o(.ctors))
  90         KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
  91         KEEP (*(SORT(.ctors.*)))
  92         KEEP (*crtend.o(.ctors))
  93
  94         . = ALIGN(0x4);
  95         KEEP (*crtbegin.o(.dtors))
  96         KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
  97         KEEP (*(SORT(.dtors.*)))
  98         KEEP (*crtend.o(.dtors))
  99     } > MFlash256
 100
 101     /*
 102      * for exception handling/unwind - some Newlib functions (in common
 103      * with C++ and STDC++) use this.
 104      */
 105     .ARM.extab : ALIGN(4)
 106     {
 107         *(.ARM.extab* .gnu.linkonce.armextab.*)
 108     } > MFlash256
 109     __exidx_start = .;
 110
 111     .ARM.exidx : ALIGN(4)
 112     {
 113         *(.ARM.exidx* .gnu.linkonce.armexidx.*)
 114     } > MFlash256
 115     __exidx_end = .;
 116
 117     _etext = .;
 118
 119     /* possible MTB section for Ram1_2 */
 120     .mtb_buffer_RAM2 (NOLOAD) :
 121     {
 122         KEEP(*(.mtb.$RAM2*))
 123         KEEP(*(.mtb.$RAM1_2*))
 124     } > Ram1_2
 125
 126     /* DATA section for Ram1_2 */
 127     .data_RAM2 : ALIGN(4)
 128     {
 129        FILL(0xff)
 130        *(.ramfunc.$RAM2)
 131        *(.ramfunc.$Ram1_2)
 132         *(.data.$RAM2*)
 133         *(.data.$Ram1_2*)
 134        . = ALIGN(4) ;
 135     } > Ram1_2 AT>MFlash256
 136     /* possible MTB section for Ram2USB_2 */
 137     .mtb_buffer_RAM3 (NOLOAD) :
 138     {
 139         KEEP(*(.mtb.$RAM3*))
 140         KEEP(*(.mtb.$RAM2USB_2*))
 141     } > Ram2USB_2
 142
 143     /* DATA section for Ram2USB_2 */
 144     .data_RAM3 : ALIGN(4)
 145     {
 146        FILL(0xff)
 147        *(.ramfunc.$RAM3)
 148        *(.ramfunc.$Ram2USB_2)
 149         *(.data.$RAM3*)
 150         *(.data.$Ram2USB_2*)
 151        . = ALIGN(4) ;
 152     } > Ram2USB_2 AT>MFlash256
 153
 154     /* MAIN DATA SECTION */
 155
 156     /* Default MTB section */
 157     .mtb_buffer_default (NOLOAD) :
 158     {
 159        KEEP(*(.mtb*))
 160     } > Ram0_32
 161
 162     .uninit_RESERVED : ALIGN(4)
 163     {
 164         KEEP(*(.bss.$RESERVED*))
 165         . = ALIGN(4) ;
 166         _end_uninit_RESERVED = .;
 167     } > Ram0_32
 168
 169
 170         /* Main DATA section (Ram0_32) */
 171         .data : ALIGN(4)
 172         {
 173            FILL(0xff)
 174            _data = . ;
 175            *(vtable)
 176            *(.ramfunc*)
 177            *(.data*)
 178            . = ALIGN(4) ;
 179            _edata = . ;
 180         } > Ram0_32 AT>MFlash256
 181
 182     /* BSS section for Ram1_2 */
 183     .bss_RAM2 : ALIGN(4)
 184     {
 185         *(.bss.$RAM2*)
 186         *(.bss.$Ram1_2*)
 187        . = ALIGN(4) ;
 188     } > Ram1_2
 189     /* BSS section for Ram2USB_2 */
 190     .bss_RAM3 : ALIGN(4)
 191     {
 192         *(.bss.$RAM3*)
 193         *(.bss.$Ram2USB_2*)
 194        . = ALIGN(4) ;
 195     } > Ram2USB_2
 196
 197     /* MAIN BSS SECTION */
 198     .bss : ALIGN(4)
 199     {
 200         _bss = .;
 201         *(.bss*)
 202         *(COMMON)
 203         . = ALIGN(4) ;
 204         _ebss = .;
 205         PROVIDE(end = .);
 206         __end__ = .;
 207     } > Ram0_32
 208
 209     /* NOINIT section for Ram1_2 */
 210     .noinit_RAM2 (NOLOAD) : ALIGN(4)
 211     {
 212         *(.noinit.$RAM2*)
 213         *(.noinit.$Ram1_2*)
 214        . = ALIGN(4) ;
 215     } > Ram1_2
 216     /* NOINIT section for Ram2USB_2 */
 217     .noinit_RAM3 (NOLOAD) : ALIGN(4)
 218     {
 219         *(.noinit.$RAM3*)
 220         *(.noinit.$Ram2USB_2*)
 221        . = ALIGN(4) ;
 222     } > Ram2USB_2
 223
 224     /* DEFAULT NOINIT SECTION */
 225     .noinit (NOLOAD): ALIGN(4)
 226     {
 227         _noinit = .;
 228         *(.noinit*)
 229          . = ALIGN(4) ;
 230         _end_noinit = .;
 231     } > Ram0_32
 232
 233     PROVIDE(_pvHeapStart = .);
 234     PROVIDE(_vStackTop = __top_Ram0_32 - 0);
 235 }