]> git.gir.st - tmk_keyboard.git/blob - tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_GCC_CR/TARGET_LPC11U68/LPC11U68.ld
Merge commit '1fe4406f374291ab2e86e95a97341fd9c475fcb8'
[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_NXP / TARGET_LPC11U6X / TOOLCHAIN_GCC_CR / TARGET_LPC11U68 / LPC11U68.ld
1 /*Based on following file*/
2 /*
3 * GENERATED FILE - DO NOT EDIT
4 * (c) Code Red Technologies Ltd, 2008-13
5 * (c) NXP Semiconductors 2013-2014
6 * Generated linker script file for LPC11U68
7 * Created from LibIncTemplate.ld (LPCXpresso v7.2 (0 [Build 153] [2014-05-19] ))
8 * By LPCXpresso v7.2.0 [Build 153] [2014-05-19] on Sat Jun 14 15:26:54 JST 2014
9 */
10 GROUP(libgcc.a libc.a libstdc++.a libm.a libcr_newlib_nohost.a crti.o crtn.o crtbegin.o crtend.o)
11
12 MEMORY
13 {
14 /* Define each memory region */
15 MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes */
16 Ram0_32 (rwx) : ORIGIN = 0x10000000+0x100, LENGTH = 0x8000-0x100 /* 32K bytes */
17 Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes */
18 Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes */
19
20
21 }
22 /* Define a symbol for the top of each memory region */
23 __top_MFlash256 = 0x0 + 0x40000;
24 __top_Ram0_32 = 0x10000000+0x100 + 0x8000-0x100;
25 __top_Ram1_2 = 0x20000000 + 0x800;
26 __top_Ram2USB_2 = 0x20004000 + 0x800;
27
28 ENTRY(ResetISR)
29
30 SECTIONS
31 {
32
33 /* MAIN TEXT SECTION */
34 .text : ALIGN(4)
35 {
36 FILL(0xff)
37 KEEP(*(.isr_vector))
38 *(.text.ResetISR)
39 *(.text.SystemInit)
40
41 /* Global Section Table */
42 . = ALIGN(4) ;
43 __section_table_start = .;
44 __data_section_table = .;
45 LONG(LOADADDR(.data));
46 LONG( ADDR(.data));
47 LONG( SIZEOF(.data));
48 LONG(LOADADDR(.data_RAM2));
49 LONG( ADDR(.data_RAM2));
50 LONG( SIZEOF(.data_RAM2));
51 LONG(LOADADDR(.data_RAM3));
52 LONG( ADDR(.data_RAM3));
53 LONG( SIZEOF(.data_RAM3));
54 __data_section_table_end = .;
55 __bss_section_table = .;
56 LONG( ADDR(.bss));
57 LONG( SIZEOF(.bss));
58 LONG( ADDR(.bss_RAM2));
59 LONG( SIZEOF(.bss_RAM2));
60 LONG( ADDR(.bss_RAM3));
61 LONG( SIZEOF(.bss_RAM3));
62 __bss_section_table_end = .;
63 __section_table_end = . ;
64 /* End of Global Section Table */
65
66
67 *(.after_vectors*)
68
69 *(.text*)
70 *(.rodata .rodata.*)
71 . = ALIGN(4);
72
73 /* C++ constructors etc */
74 . = ALIGN(4);
75 KEEP(*(.init))
76
77 . = ALIGN(4);
78 __preinit_array_start = .;
79 KEEP (*(.preinit_array))
80 __preinit_array_end = .;
81
82 . = ALIGN(4);
83 __init_array_start = .;
84 KEEP (*(SORT(.init_array.*)))
85 KEEP (*(.init_array))
86 __init_array_end = .;
87
88 KEEP(*(.fini));
89
90 . = ALIGN(0x4);
91 KEEP (*crtbegin.o(.ctors))
92 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
93 KEEP (*(SORT(.ctors.*)))
94 KEEP (*crtend.o(.ctors))
95
96 . = ALIGN(0x4);
97 KEEP (*crtbegin.o(.dtors))
98 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
99 KEEP (*(SORT(.dtors.*)))
100 KEEP (*crtend.o(.dtors))
101 } > MFlash256
102
103 /*
104 * for exception handling/unwind - some Newlib functions (in common
105 * with C++ and STDC++) use this.
106 */
107 .ARM.extab : ALIGN(4)
108 {
109 *(.ARM.extab* .gnu.linkonce.armextab.*)
110 } > MFlash256
111 __exidx_start = .;
112
113 .ARM.exidx : ALIGN(4)
114 {
115 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
116 } > MFlash256
117 __exidx_end = .;
118
119 _etext = .;
120
121 /* possible MTB section for Ram1_2 */
122 .mtb_buffer_RAM2 (NOLOAD) :
123 {
124 KEEP(*(.mtb.$RAM2*))
125 KEEP(*(.mtb.$RAM1_2*))
126 } > Ram1_2
127
128 /* DATA section for Ram1_2 */
129 .data_RAM2 : ALIGN(4)
130 {
131 FILL(0xff)
132 *(.ramfunc.$RAM2)
133 *(.ramfunc.$Ram1_2)
134 *(.data.$RAM2*)
135 *(.data.$Ram1_2*)
136 . = ALIGN(4) ;
137 } > Ram1_2 AT>MFlash256
138 /* possible MTB section for Ram2USB_2 */
139 .mtb_buffer_RAM3 (NOLOAD) :
140 {
141 KEEP(*(.mtb.$RAM3*))
142 KEEP(*(.mtb.$RAM2USB_2*))
143 } > Ram2USB_2
144
145 /* DATA section for Ram2USB_2 */
146 .data_RAM3 : ALIGN(4)
147 {
148 FILL(0xff)
149 *(.ramfunc.$RAM3)
150 *(.ramfunc.$Ram2USB_2)
151 *(.data.$RAM3*)
152 *(.data.$Ram2USB_2*)
153 . = ALIGN(4) ;
154 } > Ram2USB_2 AT>MFlash256
155
156 /* MAIN DATA SECTION */
157
158 /* Default MTB section */
159 .mtb_buffer_default (NOLOAD) :
160 {
161 KEEP(*(.mtb*))
162 } > Ram0_32
163
164 .uninit_RESERVED : ALIGN(4)
165 {
166 KEEP(*(.bss.$RESERVED*))
167 . = ALIGN(4) ;
168 _end_uninit_RESERVED = .;
169 } > Ram0_32
170
171
172 /* Main DATA section (Ram0_32) */
173 .data : ALIGN(4)
174 {
175 FILL(0xff)
176 _data = . ;
177 *(vtable)
178 *(.ramfunc*)
179 *(.data*)
180 . = ALIGN(4) ;
181 _edata = . ;
182 } > Ram0_32 AT>MFlash256
183
184 /* BSS section for Ram1_2 */
185 .bss_RAM2 : ALIGN(4)
186 {
187 *(.bss.$RAM2*)
188 *(.bss.$Ram1_2*)
189 . = ALIGN(4) ;
190 } > Ram1_2
191 /* BSS section for Ram2USB_2 */
192 .bss_RAM3 : ALIGN(4)
193 {
194 *(.bss.$RAM3*)
195 *(.bss.$Ram2USB_2*)
196 . = ALIGN(4) ;
197 } > Ram2USB_2
198
199 /* MAIN BSS SECTION */
200 .bss : ALIGN(4)
201 {
202 _bss = .;
203 *(.bss*)
204 *(COMMON)
205 . = ALIGN(4) ;
206 _ebss = .;
207 PROVIDE(end = .);
208 __end__ = .;
209 } > Ram0_32
210
211 /* NOINIT section for Ram1_2 */
212 .noinit_RAM2 (NOLOAD) : ALIGN(4)
213 {
214 *(.noinit.$RAM2*)
215 *(.noinit.$Ram1_2*)
216 . = ALIGN(4) ;
217 } > Ram1_2
218 /* NOINIT section for Ram2USB_2 */
219 .noinit_RAM3 (NOLOAD) : ALIGN(4)
220 {
221 *(.noinit.$RAM3*)
222 *(.noinit.$Ram2USB_2*)
223 . = ALIGN(4) ;
224 } > Ram2USB_2
225
226 /* DEFAULT NOINIT SECTION */
227 .noinit (NOLOAD): ALIGN(4)
228 {
229 _noinit = .;
230 *(.noinit*)
231 . = ALIGN(4) ;
232 _end_noinit = .;
233 } > Ram0_32
234
235 PROVIDE(_pvHeapStart = .);
236 PROVIDE(_vStackTop = __top_Ram0_32 - 0);
237 }
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