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[tmk_keyboard.git] / tmk_core / tool / mbed / mbed-sdk / libraries / mbed / targets / cmsis / TARGET_NXP / TARGET_LPC11UXX / TOOLCHAIN_ARM_STD / TARGET_LPC11U35_401 / startup_LPC11xx.s
1 ;/*****************************************************************************
2 ; * @file: startup_LPC11xx.s
3 ; * @purpose: CMSIS Cortex-M0 Core Device Startup File
4 ; * for the NXP LPC11xx Device Series
5 ; * @version: V1.0
6 ; * @date: 25. Nov. 2008
7 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
8 ; *
9 ; * Copyright (C) 2008 ARM Limited. All rights reserved.
10 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
11 ; * processor based microcontrollers. This file can be freely distributed
12 ; * within development tools that are supporting such ARM based processors.
13 ; *
14 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
15 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
16 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
17 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
18 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
19 ; *
20 ; *****************************************************************************/
21
22 __initial_sp EQU 0x10002000 ; Top of RAM from LPC11U
23
24 PRESERVE8
25 THUMB
26
27 ; Vector Table Mapped to Address 0 at Reset
28
29 AREA RESET, DATA, READONLY
30 EXPORT __Vectors
31
32 __Vectors DCD __initial_sp ; Top of Stack
33 DCD Reset_Handler ; Reset Handler
34 DCD NMI_Handler ; NMI Handler
35 DCD HardFault_Handler ; Hard Fault Handler
36 DCD MemManage_Handler ; MPU Fault Handler
37 DCD BusFault_Handler ; Bus Fault Handler
38 DCD UsageFault_Handler ; Usage Fault Handler
39 DCD 0 ; Reserved
40 DCD 0 ; Reserved
41 DCD 0 ; Reserved
42 DCD 0 ; Reserved
43 DCD SVC_Handler ; SVCall Handler
44 DCD DebugMon_Handler ; Debug Monitor Handler
45 DCD 0 ; Reserved
46 DCD PendSV_Handler ; PendSV Handler
47 DCD SysTick_Handler ; SysTick Handler
48
49 ; External Interrupts
50 ; for LPC11Uxx (With USB)
51 DCD FLEX_INT0_IRQHandler ; All GPIO pin can be routed to FLEX_INTx
52 DCD FLEX_INT1_IRQHandler
53 DCD FLEX_INT2_IRQHandler
54 DCD FLEX_INT3_IRQHandler
55 DCD FLEX_INT4_IRQHandler
56 DCD FLEX_INT5_IRQHandler
57 DCD FLEX_INT6_IRQHandler
58 DCD FLEX_INT7_IRQHandler
59 DCD GINT0_IRQHandler
60 DCD GINT1_IRQHandler ; PIO0 (0:7)
61 DCD Reserved_IRQHandler ; Reserved
62 DCD Reserved_IRQHandler
63 DCD Reserved_IRQHandler
64 DCD Reserved_IRQHandler
65 DCD SSP1_IRQHandler ; SSP1
66 DCD I2C_IRQHandler ; I2C
67 DCD TIMER16_0_IRQHandler ; 16-bit Timer0
68 DCD TIMER16_1_IRQHandler ; 16-bit Timer1
69 DCD TIMER32_0_IRQHandler ; 32-bit Timer0
70 DCD TIMER32_1_IRQHandler ; 32-bit Timer1
71 DCD SSP0_IRQHandler ; SSP0
72 DCD UART_IRQHandler ; UART
73 DCD USB_IRQHandler ; USB IRQ
74 DCD USB_FIQHandler ; USB FIQ
75 DCD ADC_IRQHandler ; A/D Converter
76 DCD WDT_IRQHandler ; Watchdog timer
77 DCD BOD_IRQHandler ; Brown Out Detect
78 DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
79 DCD Reserved_IRQHandler ; Reserved
80 DCD Reserved_IRQHandler ; Reserved
81 DCD USBWakeup_IRQHandler ; USB wake up
82 DCD Reserved_IRQHandler ; Reserved
83
84 ;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
85
86 DCD 0xFFFFFFFF ; Datafill
87 DCD 0xFFFFFFFF ; Datafill
88 DCD 0xFFFFFFFF ; Datafill
89 DCD 0xFFFFFFFF ; Datafill
90 DCD 0xFFFFFFFF ; Datafill
91 DCD 0xFFFFFFFF ; Datafill
92 DCD 0xFFFFFFFF ; Datafill
93 DCD 0xFFFFFFFF ; Datafill
94 DCD 0xFFFFFFFF ; Datafill
95 DCD 0xFFFFFFFF ; Datafill
96
97 DCD 0xFFFFFFFF ; Datafill
98 DCD 0xFFFFFFFF ; Datafill
99 DCD 0xFFFFFFFF ; Datafill
100 DCD 0xFFFFFFFF ; Datafill
101 DCD 0xFFFFFFFF ; Datafill
102 DCD 0xFFFFFFFF ; Datafill
103 DCD 0xFFFFFFFF ; Datafill
104 DCD 0xFFFFFFFF ; Datafill
105 DCD 0xFFFFFFFF ; Datafill
106 DCD 0xFFFFFFFF ; Datafill
107
108 DCD 0xFFFFFFFF ; Datafill
109 DCD 0xFFFFFFFF ; Datafill
110 DCD 0xFFFFFFFF ; Datafill
111 DCD 0xFFFFFFFF ; Datafill
112 DCD 0xFFFFFFFF ; Datafill
113 DCD 0xFFFFFFFF ; Datafill
114 DCD 0xFFFFFFFF ; Datafill
115 DCD 0xFFFFFFFF ; Datafill
116 DCD 0xFFFFFFFF ; Datafill
117 DCD 0xFFFFFFFF ; Datafill
118
119 DCD 0xFFFFFFFF ; Datafill
120 DCD 0xFFFFFFFF ; Datafill
121 DCD 0xFFFFFFFF ; Datafill
122 DCD 0xFFFFFFFF ; Datafill
123 DCD 0xFFFFFFFF ; Datafill
124 DCD 0xFFFFFFFF ; Datafill
125 DCD 0xFFFFFFFF ; Datafill
126 DCD 0xFFFFFFFF ; Datafill
127 DCD 0xFFFFFFFF ; Datafill
128 DCD 0xFFFFFFFF ; Datafill
129
130 DCD 0xFFFFFFFF ; Datafill
131 DCD 0xFFFFFFFF ; Datafill
132 DCD 0xFFFFFFFF ; Datafill
133 DCD 0xFFFFFFFF ; Datafill
134 DCD 0xFFFFFFFF ; Datafill
135 DCD 0xFFFFFFFF ; Datafill
136 DCD 0xFFFFFFFF ; Datafill
137 DCD 0xFFFFFFFF ; Datafill
138 DCD 0xFFFFFFFF ; Datafill
139 DCD 0xFFFFFFFF ; Datafill
140
141 DCD 0xFFFFFFFF ; Datafill
142 DCD 0xFFFFFFFF ; Datafill
143 DCD 0xFFFFFFFF ; Datafill
144 DCD 0xFFFFFFFF ; Datafill
145 DCD 0xFFFFFFFF ; Datafill
146 DCD 0xFFFFFFFF ; Datafill
147 DCD 0xFFFFFFFF ; Datafill
148 DCD 0xFFFFFFFF ; Datafill
149 DCD 0xFFFFFFFF ; Datafill
150 DCD 0xFFFFFFFF ; Datafill
151
152 DCD 0xFFFFFFFF ; Datafill
153 DCD 0xFFFFFFFF ; Datafill
154 DCD 0xFFFFFFFF ; Datafill
155 DCD 0xFFFFFFFF ; Datafill
156 DCD 0xFFFFFFFF ; Datafill
157 DCD 0xFFFFFFFF ; Datafill
158 DCD 0xFFFFFFFF ; Datafill
159 DCD 0xFFFFFFFF ; Datafill
160 DCD 0xFFFFFFFF ; Datafill
161 DCD 0xFFFFFFFF ; Datafill
162
163 DCD 0xFFFFFFFF ; Datafill
164 DCD 0xFFFFFFFF ; Datafill
165 DCD 0xFFFFFFFF ; Datafill
166 DCD 0xFFFFFFFF ; Datafill
167 DCD 0xFFFFFFFF ; Datafill
168 DCD 0xFFFFFFFF ; Datafill
169 DCD 0xFFFFFFFF ; Datafill
170 DCD 0xFFFFFFFF ; Datafill
171 DCD 0xFFFFFFFF ; Datafill
172 DCD 0xFFFFFFFF ; Datafill
173
174 IF :LNOT::DEF:NO_CRP
175 AREA |.ARM.__at_0x02FC|, CODE, READONLY
176 CRP_Key DCD 0xFFFFFFFF
177 ENDIF
178
179
180 AREA |.text|, CODE, READONLY
181
182
183
184 ; Reset Handler
185
186 Reset_Handler PROC
187 EXPORT Reset_Handler [WEAK]
188 IMPORT SystemInit
189 IMPORT __main
190 LDR R0, =SystemInit
191 BLX R0
192 LDR R0, =__main
193 BX R0
194 ENDP
195
196 ; Dummy Exception Handlers (infinite loops which can be modified)
197
198 ; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
199 ; for particular peripheral.
200 ;NMI_Handler PROC
201 ; EXPORT NMI_Handler [WEAK]
202 ; B .
203 ; ENDP
204 HardFault_Handler\
205 PROC
206 EXPORT HardFault_Handler [WEAK]
207 B .
208 ENDP
209 MemManage_Handler\
210 PROC
211 EXPORT MemManage_Handler [WEAK]
212 B .
213 ENDP
214 BusFault_Handler\
215 PROC
216 EXPORT BusFault_Handler [WEAK]
217 B .
218 ENDP
219 UsageFault_Handler\
220 PROC
221 EXPORT UsageFault_Handler [WEAK]
222 B .
223 ENDP
224 SVC_Handler PROC
225 EXPORT SVC_Handler [WEAK]
226 B .
227 ENDP
228 DebugMon_Handler\
229 PROC
230 EXPORT DebugMon_Handler [WEAK]
231 B .
232 ENDP
233 PendSV_Handler PROC
234 EXPORT PendSV_Handler [WEAK]
235 B .
236 ENDP
237 SysTick_Handler PROC
238 EXPORT SysTick_Handler [WEAK]
239 B .
240 ENDP
241 Reserved_IRQHandler PROC
242 EXPORT Reserved_IRQHandler [WEAK]
243 B .
244 ENDP
245
246 Default_Handler PROC
247 ; for LPC11Uxx (With USB)
248 EXPORT NMI_Handler [WEAK]
249 EXPORT FLEX_INT0_IRQHandler [WEAK]
250 EXPORT FLEX_INT1_IRQHandler [WEAK]
251 EXPORT FLEX_INT2_IRQHandler [WEAK]
252 EXPORT FLEX_INT3_IRQHandler [WEAK]
253 EXPORT FLEX_INT4_IRQHandler [WEAK]
254 EXPORT FLEX_INT5_IRQHandler [WEAK]
255 EXPORT FLEX_INT6_IRQHandler [WEAK]
256 EXPORT FLEX_INT7_IRQHandler [WEAK]
257 EXPORT GINT0_IRQHandler [WEAK]
258 EXPORT GINT1_IRQHandler [WEAK]
259 EXPORT SSP1_IRQHandler [WEAK]
260 EXPORT I2C_IRQHandler [WEAK]
261 EXPORT TIMER16_0_IRQHandler [WEAK]
262 EXPORT TIMER16_1_IRQHandler [WEAK]
263 EXPORT TIMER32_0_IRQHandler [WEAK]
264 EXPORT TIMER32_1_IRQHandler [WEAK]
265 EXPORT SSP0_IRQHandler [WEAK]
266 EXPORT UART_IRQHandler [WEAK]
267
268 EXPORT USB_IRQHandler [WEAK]
269 EXPORT USB_FIQHandler [WEAK]
270 EXPORT ADC_IRQHandler [WEAK]
271 EXPORT WDT_IRQHandler [WEAK]
272 EXPORT BOD_IRQHandler [WEAK]
273 EXPORT FMC_IRQHandler [WEAK]
274 EXPORT USBWakeup_IRQHandler [WEAK]
275
276 NMI_Handler
277 FLEX_INT0_IRQHandler
278 FLEX_INT1_IRQHandler
279 FLEX_INT2_IRQHandler
280 FLEX_INT3_IRQHandler
281 FLEX_INT4_IRQHandler
282 FLEX_INT5_IRQHandler
283 FLEX_INT6_IRQHandler
284 FLEX_INT7_IRQHandler
285 GINT0_IRQHandler
286 GINT1_IRQHandler
287 SSP1_IRQHandler
288 I2C_IRQHandler
289 TIMER16_0_IRQHandler
290 TIMER16_1_IRQHandler
291 TIMER32_0_IRQHandler
292 TIMER32_1_IRQHandler
293 SSP0_IRQHandler
294 UART_IRQHandler
295 USB_IRQHandler
296 USB_FIQHandler
297 ADC_IRQHandler
298 WDT_IRQHandler
299 BOD_IRQHandler
300 FMC_IRQHandler
301 USBWakeup_IRQHandler
302
303 B .
304
305 ENDP
306
307 ALIGN
308 END
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