tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/startup_LPC11xx.s

   1 ;/*****************************************************************************
   2 ; * @file:    startup_LPC11xx.s
   3 ; * @purpose: CMSIS Cortex-M0 Core Device Startup File
   4 ; *           for the NXP LPC11xx Device Series
   5 ; * @version: V1.0
   6 ; * @date:    25. Nov. 2008
   7 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
   8 ; *
   9 ; * Copyright (C) 2008 ARM Limited. All rights reserved.
  10 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
  11 ; * processor based microcontrollers.  This file can be freely distributed
  12 ; * within development tools that are supporting such ARM based processors.
  13 ; *
  14 ; * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  15 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  16 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  17 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  18 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  19 ; *
  20 ; *****************************************************************************/
  21
  22 Stack_Size      EQU     0x00000400
  23
  24                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
  25                 EXPORT  __initial_sp
  26
  27 Stack_Mem       SPACE   Stack_Size
  28 __initial_sp        EQU     0x10002000  ; Top of RAM from LPC1114
  29
  30
  31 Heap_Size       EQU     0x00000000
  32
  33                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
  34                 EXPORT  __heap_base
  35                 EXPORT  __heap_limit
  36
  37 __heap_base
  38 Heap_Mem        SPACE   Heap_Size
  39 __heap_limit
  40
  41                 PRESERVE8
  42                 THUMB
  43
  44 ; Vector Table Mapped to Address 0 at Reset
  45
  46                 AREA    RESET, DATA, READONLY
  47                 EXPORT  __Vectors
  48
  49 __Vectors       DCD     __initial_sp              ; Top of Stack
  50                 DCD     Reset_Handler             ; Reset Handler
  51                 DCD     NMI_Handler               ; NMI Handler
  52                 DCD     HardFault_Handler         ; Hard Fault Handler
  53                 DCD     0                         ; Reserved
  54                 DCD     0                         ; Reserved
  55                 DCD     0                         ; Reserved
  56                 DCD     0                         ; Reserved
  57                 DCD     0                         ; Reserved
  58                 DCD     0                         ; Reserved
  59                 DCD     0                         ; Reserved
  60                 DCD     SVC_Handler               ; SVCall Handler
  61                 DCD     0                         ; Reserved
  62                 DCD     0                         ; Reserved
  63                 DCD     PendSV_Handler            ; PendSV Handler
  64                 DCD     SysTick_Handler           ; SysTick Handler
  65
  66                 DCD     SLWU_INT0_IRQHandler      ; Start logic wake-up interrupt 0
  67                 DCD     SLWU_INT1_IRQHandler      ; Start logic wake-up interrupt 1
  68                 DCD     SLWU_INT2_IRQHandler      ; Start logic wake-up interrupt 2
  69                 DCD     SLWU_INT3_IRQHandler      ; Start logic wake-up interrupt 3
  70                 DCD     SLWU_INT4_IRQHandler      ; Start logic wake-up interrupt 4
  71                 DCD     SLWU_INT5_IRQHandler      ; Start logic wake-up interrupt 5
  72                 DCD     SLWU_INT6_IRQHandler      ; Start logic wake-up interrupt 6
  73                 DCD     SLWU_INT7_IRQHandler      ; Start logic wake-up interrupt 7
  74                 DCD     SLWU_INT8_IRQHandler      ; Start logic wake-up interrupt 8
  75                 DCD     SLWU_INT9_IRQHandler      ; Start logic wake-up interrupt 9
  76                 DCD     SLWU_INT10_IRQHandler     ; Start logic wake-up interrupt 10
  77                 DCD     SLWU_INT11_IRQHandler     ; Start logic wake-up interrupt 11
  78                 DCD     SLWU_INT12_IRQHandler     ; Start logic wake-up interrupt 12
  79                 DCD     C_CAN_IRQHandler          ; C_CAN
  80                 DCD     SSP1_IRQHandler           ; SSP1
  81                 DCD     I2C_IRQHandler            ; I2C
  82                 DCD     TIMER16_0_IRQHandler      ; 16-bit Timer0
  83                 DCD     TIMER16_1_IRQHandler      ; 16-bit Timer1
  84                 DCD     TIMER32_0_IRQHandler      ; 32-bit Timer0
  85                 DCD     TIMER32_1_IRQHandler      ; 32-bit Timer1
  86                 DCD     SSP0_IRQHandler           ; SSP0
  87                 DCD     UART_IRQHandler           ; UART
  88                 DCD     Reserved_IRQHandler       ; Reserved
  89                 DCD     Reserved_IRQHandler       ; Reserved
  90                 DCD     ADC_IRQHandler            ; A/D Converter
  91                 DCD     WDT_IRQHandler            ; Watchdog timer
  92                 DCD     BOD_IRQHandler            ; Brown Out Detect
  93                 DCD     Reserved_IRQHandler       ; Reserved
  94                 DCD     PIO_3_IRQHandler          ; GPIO interrupt status of port 3
  95                 DCD     PIO_2_IRQHandler          ; GPIO interrupt status of port 2
  96                 DCD     PIO_1_IRQHandler          ; GPIO interrupt status of port 1
  97                 DCD     PIO_0_IRQHandler          ; GPIO interrupt status of port 0
  98
  99         ;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
 100
 101                 DCD     0xFFFFFFFF                ; Datafill
 102                 DCD     0xFFFFFFFF                ; Datafill
 103                 DCD     0xFFFFFFFF                ; Datafill
 104                 DCD     0xFFFFFFFF                ; Datafill
 105                 DCD     0xFFFFFFFF                ; Datafill
 106                 DCD     0xFFFFFFFF                ; Datafill
 107                 DCD     0xFFFFFFFF                ; Datafill
 108                 DCD     0xFFFFFFFF                ; Datafill
 109                 DCD     0xFFFFFFFF                ; Datafill
 110                 DCD     0xFFFFFFFF                ; Datafill
 111
 112                 DCD     0xFFFFFFFF                ; Datafill
 113                 DCD     0xFFFFFFFF                ; Datafill
 114                 DCD     0xFFFFFFFF                ; Datafill
 115                 DCD     0xFFFFFFFF                ; Datafill
 116                 DCD     0xFFFFFFFF                ; Datafill
 117                 DCD     0xFFFFFFFF                ; Datafill
 118                 DCD     0xFFFFFFFF                ; Datafill
 119                 DCD     0xFFFFFFFF                ; Datafill
 120                 DCD     0xFFFFFFFF                ; Datafill
 121                 DCD     0xFFFFFFFF                ; Datafill
 122
 123                 DCD     0xFFFFFFFF                ; Datafill
 124                 DCD     0xFFFFFFFF                ; Datafill
 125                 DCD     0xFFFFFFFF                ; Datafill
 126                 DCD     0xFFFFFFFF                ; Datafill
 127                 DCD     0xFFFFFFFF                ; Datafill
 128                 DCD     0xFFFFFFFF                ; Datafill
 129                 DCD     0xFFFFFFFF                ; Datafill
 130                 DCD     0xFFFFFFFF                ; Datafill
 131                 DCD     0xFFFFFFFF                ; Datafill
 132                 DCD     0xFFFFFFFF                ; Datafill
 133
 134                 DCD     0xFFFFFFFF                ; Datafill
 135                 DCD     0xFFFFFFFF                ; Datafill
 136                 DCD     0xFFFFFFFF                ; Datafill
 137                 DCD     0xFFFFFFFF                ; Datafill
 138                 DCD     0xFFFFFFFF                ; Datafill
 139                 DCD     0xFFFFFFFF                ; Datafill
 140                 DCD     0xFFFFFFFF                ; Datafill
 141                 DCD     0xFFFFFFFF                ; Datafill
 142                 DCD     0xFFFFFFFF                ; Datafill
 143                 DCD     0xFFFFFFFF                ; Datafill
 144
 145                 DCD     0xFFFFFFFF                ; Datafill
 146                 DCD     0xFFFFFFFF                ; Datafill
 147                 DCD     0xFFFFFFFF                ; Datafill
 148                 DCD     0xFFFFFFFF                ; Datafill
 149                 DCD     0xFFFFFFFF                ; Datafill
 150                 DCD     0xFFFFFFFF                ; Datafill
 151                 DCD     0xFFFFFFFF                ; Datafill
 152                 DCD     0xFFFFFFFF                ; Datafill
 153                 DCD     0xFFFFFFFF                ; Datafill
 154                 DCD     0xFFFFFFFF                ; Datafill
 155
 156                 DCD     0xFFFFFFFF                ; Datafill
 157                 DCD     0xFFFFFFFF                ; Datafill
 158                 DCD     0xFFFFFFFF                ; Datafill
 159                 DCD     0xFFFFFFFF                ; Datafill
 160                 DCD     0xFFFFFFFF                ; Datafill
 161                 DCD     0xFFFFFFFF                ; Datafill
 162                 DCD     0xFFFFFFFF                ; Datafill
 163                 DCD     0xFFFFFFFF                ; Datafill
 164                 DCD     0xFFFFFFFF                ; Datafill
 165                 DCD     0xFFFFFFFF                ; Datafill
 166
 167                 DCD     0xFFFFFFFF                ; Datafill
 168                 DCD     0xFFFFFFFF                ; Datafill
 169                 DCD     0xFFFFFFFF                ; Datafill
 170                 DCD     0xFFFFFFFF                ; Datafill
 171                 DCD     0xFFFFFFFF                ; Datafill
 172                 DCD     0xFFFFFFFF                ; Datafill
 173                 DCD     0xFFFFFFFF                ; Datafill
 174                 DCD     0xFFFFFFFF                ; Datafill
 175                 DCD     0xFFFFFFFF                ; Datafill
 176                 DCD     0xFFFFFFFF                ; Datafill
 177
 178                 DCD     0xFFFFFFFF                ; Datafill
 179                 DCD     0xFFFFFFFF                ; Datafill
 180                 DCD     0xFFFFFFFF                ; Datafill
 181                 DCD     0xFFFFFFFF                ; Datafill
 182                 DCD     0xFFFFFFFF                ; Datafill
 183                 DCD     0xFFFFFFFF                ; Datafill
 184                 DCD     0xFFFFFFFF                ; Datafill
 185                 DCD     0xFFFFFFFF                ; Datafill
 186                 DCD     0xFFFFFFFF                ; Datafill
 187                 DCD     0xFFFFFFFF                ; Datafill
 188
 189                 IF      :LNOT::DEF:NO_CRP
 190                 AREA    |.ARM.__at_0x02FC|, CODE, READONLY
 191 CRP_Key         DCD     0xFFFFFFFF
 192                 ENDIF
 193
 194                 AREA    |.text|, CODE, READONLY
 195
 196 ; Reset Handler
 197
 198 Reset_Handler   PROC
 199                 EXPORT  Reset_Handler             [WEAK]
 200                 IMPORT  SystemInit
 201                 IMPORT  __main
 202                 LDR     R0, =SystemInit
 203                 BLX     R0
 204                 LDR     R0, =__main
 205                 BX      R0
 206                 ENDP
 207
 208 ; Dummy Exception Handlers (infinite loops which can be modified)
 209
 210 ; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
 211 ; for particular peripheral.
 212 HardFault_Handler\
 213                 PROC
 214                 EXPORT  HardFault_Handler         [WEAK]
 215                 B       .
 216                 ENDP
 217 SVC_Handler     PROC
 218                 EXPORT  SVC_Handler               [WEAK]
 219                 B       .
 220                 ENDP
 221 PendSV_Handler  PROC
 222                 EXPORT  PendSV_Handler            [WEAK]
 223                 B       .
 224                 ENDP
 225 SysTick_Handler PROC
 226                 EXPORT  SysTick_Handler           [WEAK]
 227                 B       .
 228                 ENDP
 229 Reserved_IRQHandler PROC
 230                 EXPORT  Reserved_IRQHandler       [WEAK]
 231                 B       .
 232                 ENDP
 233
 234 Default_Handler PROC
 235 ; for LPC1114
 236                 EXPORT  NMI_Handler               [WEAK]
 237                 EXPORT  SLWU_INT0_IRQHandler      [WEAK]
 238                 EXPORT  SLWU_INT1_IRQHandler      [WEAK]
 239                 EXPORT  SLWU_INT2_IRQHandler      [WEAK]
 240                 EXPORT  SLWU_INT3_IRQHandler      [WEAK]
 241                 EXPORT  SLWU_INT4_IRQHandler      [WEAK]
 242                 EXPORT  SLWU_INT5_IRQHandler      [WEAK]
 243                 EXPORT  SLWU_INT6_IRQHandler      [WEAK]
 244                 EXPORT  SLWU_INT7_IRQHandler      [WEAK]
 245                 EXPORT  SLWU_INT8_IRQHandler      [WEAK]
 246                 EXPORT  SLWU_INT9_IRQHandler      [WEAK]
 247                 EXPORT  SLWU_INT10_IRQHandler     [WEAK]
 248                 EXPORT  SLWU_INT11_IRQHandler     [WEAK]
 249                 EXPORT  SLWU_INT12_IRQHandler     [WEAK]
 250                 EXPORT  C_CAN_IRQHandler          [WEAK]
 251                 EXPORT  SSP1_IRQHandler           [WEAK]
 252                 EXPORT  I2C_IRQHandler            [WEAK]
 253                 EXPORT  TIMER16_0_IRQHandler      [WEAK]
 254                 EXPORT  TIMER16_1_IRQHandler      [WEAK]
 255                 EXPORT  TIMER32_0_IRQHandler      [WEAK]
 256                 EXPORT  TIMER32_1_IRQHandler      [WEAK]
 257                 EXPORT  SSP0_IRQHandler           [WEAK]
 258                 EXPORT  UART_IRQHandler           [WEAK]
 259                 EXPORT  ADC_IRQHandler            [WEAK]
 260                 EXPORT  WDT_IRQHandler            [WEAK]
 261                 EXPORT  BOD_IRQHandler            [WEAK]
 262                 EXPORT  PIO_3_IRQHandler          [WEAK]
 263                 EXPORT  PIO_2_IRQHandler          [WEAK]
 264                 EXPORT  PIO_1_IRQHandler          [WEAK]
 265                 EXPORT  PIO_0_IRQHandler          [WEAK]
 266
 267 NMI_Handler
 268
 269 SLWU_INT0_IRQHandler
 270 SLWU_INT1_IRQHandler
 271 SLWU_INT2_IRQHandler
 272 SLWU_INT3_IRQHandler
 273 SLWU_INT4_IRQHandler
 274 SLWU_INT5_IRQHandler
 275 SLWU_INT6_IRQHandler
 276 SLWU_INT7_IRQHandler
 277 SLWU_INT8_IRQHandler
 278 SLWU_INT9_IRQHandler
 279 SLWU_INT10_IRQHandler
 280 SLWU_INT11_IRQHandler
 281 SLWU_INT12_IRQHandler
 282 C_CAN_IRQHandler
 283 SSP1_IRQHandler
 284 I2C_IRQHandler
 285 TIMER16_0_IRQHandler
 286 TIMER16_1_IRQHandler
 287 TIMER32_0_IRQHandler
 288 TIMER32_1_IRQHandler
 289 SSP0_IRQHandler
 290 UART_IRQHandler
 291 ADC_IRQHandler
 292 WDT_IRQHandler
 293 BOD_IRQHandler
 294 PIO_3_IRQHandler
 295 PIO_2_IRQHandler
 296 PIO_1_IRQHandler
 297 PIO_0_IRQHandler
 298
 299                 B       .
 300
 301                 ENDP
 302
 303                 ALIGN
 304                 END