tmk_core/tool/mbed/mbed-sdk/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/startup_LPC11xx.s

   1 ;/*****************************************************************************
   2 ; * @file:    startup_LPC11xx.s
   3 ; * @purpose: CMSIS Cortex-M0 Core Device Startup File
   4 ; *           for the NXP LPC11xx Device Series
   5 ; * @version: V1.0
   6 ; * @date:    25. Nov. 2008
   7 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
   8 ; *
   9 ; * Copyright (C) 2008 ARM Limited. All rights reserved.
  10 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
  11 ; * processor based microcontrollers.  This file can be freely distributed
  12 ; * within development tools that are supporting such ARM based processors.
  13 ; *
  14 ; * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  15 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  16 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  17 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  18 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  19 ; *
  20 ; *****************************************************************************/
  21
  22 __initial_sp        EQU     0x10001000  ; Top of RAM from LPC1114
  23
  24                 PRESERVE8
  25                 THUMB
  26
  27 ; Vector Table Mapped to Address 0 at Reset
  28
  29                 AREA    RESET, DATA, READONLY
  30                 EXPORT  __Vectors
  31
  32 __Vectors       DCD     __initial_sp              ; Top of Stack
  33                 DCD     Reset_Handler             ; Reset Handler
  34                 DCD     NMI_Handler               ; NMI Handler
  35                 DCD     HardFault_Handler         ; Hard Fault Handler
  36                 DCD     0                         ; Reserved
  37                 DCD     0                         ; Reserved
  38                 DCD     0                         ; Reserved
  39                 DCD     0                         ; Reserved
  40                 DCD     0                         ; Reserved
  41                 DCD     0                         ; Reserved
  42                 DCD     0                         ; Reserved
  43                 DCD     SVC_Handler               ; SVCall Handler
  44                 DCD     0                         ; Reserved
  45                 DCD     0                         ; Reserved
  46                 DCD     PendSV_Handler            ; PendSV Handler
  47                 DCD     SysTick_Handler           ; SysTick Handler
  48
  49                 DCD     SLWU_INT0_IRQHandler      ; Start logic wake-up interrupt 0
  50                 DCD     SLWU_INT1_IRQHandler      ; Start logic wake-up interrupt 1
  51                 DCD     SLWU_INT2_IRQHandler      ; Start logic wake-up interrupt 2
  52                 DCD     SLWU_INT3_IRQHandler      ; Start logic wake-up interrupt 3
  53                 DCD     SLWU_INT4_IRQHandler      ; Start logic wake-up interrupt 4
  54                 DCD     SLWU_INT5_IRQHandler      ; Start logic wake-up interrupt 5
  55                 DCD     SLWU_INT6_IRQHandler      ; Start logic wake-up interrupt 6
  56                 DCD     SLWU_INT7_IRQHandler      ; Start logic wake-up interrupt 7
  57                 DCD     SLWU_INT8_IRQHandler      ; Start logic wake-up interrupt 8
  58                 DCD     SLWU_INT9_IRQHandler      ; Start logic wake-up interrupt 9
  59                 DCD     SLWU_INT10_IRQHandler     ; Start logic wake-up interrupt 10
  60                 DCD     SLWU_INT11_IRQHandler     ; Start logic wake-up interrupt 11
  61                 DCD     SLWU_INT12_IRQHandler     ; Start logic wake-up interrupt 12
  62                 DCD     C_CAN_IRQHandler          ; C_CAN
  63                 DCD     SSP1_IRQHandler           ; SSP1
  64                 DCD     I2C_IRQHandler            ; I2C
  65                 DCD     TIMER16_0_IRQHandler      ; 16-bit Timer0
  66                 DCD     TIMER16_1_IRQHandler      ; 16-bit Timer1
  67                 DCD     TIMER32_0_IRQHandler      ; 32-bit Timer0
  68                 DCD     TIMER32_1_IRQHandler      ; 32-bit Timer1
  69                 DCD     SSP0_IRQHandler           ; SSP0
  70                 DCD     UART_IRQHandler           ; UART
  71                 DCD     Reserved_IRQHandler       ; Reserved
  72                 DCD     Reserved_IRQHandler       ; Reserved
  73                 DCD     ADC_IRQHandler            ; A/D Converter
  74                 DCD     WDT_IRQHandler            ; Watchdog timer
  75                 DCD     BOD_IRQHandler            ; Brown Out Detect
  76                 DCD     Reserved_IRQHandler       ; Reserved
  77                 DCD     PIO_3_IRQHandler          ; GPIO interrupt status of port 3
  78                 DCD     PIO_2_IRQHandler          ; GPIO interrupt status of port 2
  79                 DCD     PIO_1_IRQHandler          ; GPIO interrupt status of port 1
  80                 DCD     PIO_0_IRQHandler          ; GPIO interrupt status of port 0
  81
  82         ;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
  83
  84                 DCD     0xFFFFFFFF                ; Datafill
  85                 DCD     0xFFFFFFFF                ; Datafill
  86                 DCD     0xFFFFFFFF                ; Datafill
  87                 DCD     0xFFFFFFFF                ; Datafill
  88                 DCD     0xFFFFFFFF                ; Datafill
  89                 DCD     0xFFFFFFFF                ; Datafill
  90                 DCD     0xFFFFFFFF                ; Datafill
  91                 DCD     0xFFFFFFFF                ; Datafill
  92                 DCD     0xFFFFFFFF                ; Datafill
  93                 DCD     0xFFFFFFFF                ; Datafill
  94
  95                 DCD     0xFFFFFFFF                ; Datafill
  96                 DCD     0xFFFFFFFF                ; Datafill
  97                 DCD     0xFFFFFFFF                ; Datafill
  98                 DCD     0xFFFFFFFF                ; Datafill
  99                 DCD     0xFFFFFFFF                ; Datafill
 100                 DCD     0xFFFFFFFF                ; Datafill
 101                 DCD     0xFFFFFFFF                ; Datafill
 102                 DCD     0xFFFFFFFF                ; Datafill
 103                 DCD     0xFFFFFFFF                ; Datafill
 104                 DCD     0xFFFFFFFF                ; Datafill
 105
 106                 DCD     0xFFFFFFFF                ; Datafill
 107                 DCD     0xFFFFFFFF                ; Datafill
 108                 DCD     0xFFFFFFFF                ; Datafill
 109                 DCD     0xFFFFFFFF                ; Datafill
 110                 DCD     0xFFFFFFFF                ; Datafill
 111                 DCD     0xFFFFFFFF                ; Datafill
 112                 DCD     0xFFFFFFFF                ; Datafill
 113                 DCD     0xFFFFFFFF                ; Datafill
 114                 DCD     0xFFFFFFFF                ; Datafill
 115                 DCD     0xFFFFFFFF                ; Datafill
 116
 117                 DCD     0xFFFFFFFF                ; Datafill
 118                 DCD     0xFFFFFFFF                ; Datafill
 119                 DCD     0xFFFFFFFF                ; Datafill
 120                 DCD     0xFFFFFFFF                ; Datafill
 121                 DCD     0xFFFFFFFF                ; Datafill
 122                 DCD     0xFFFFFFFF                ; Datafill
 123                 DCD     0xFFFFFFFF                ; Datafill
 124                 DCD     0xFFFFFFFF                ; Datafill
 125                 DCD     0xFFFFFFFF                ; Datafill
 126                 DCD     0xFFFFFFFF                ; Datafill
 127
 128                 DCD     0xFFFFFFFF                ; Datafill
 129                 DCD     0xFFFFFFFF                ; Datafill
 130                 DCD     0xFFFFFFFF                ; Datafill
 131                 DCD     0xFFFFFFFF                ; Datafill
 132                 DCD     0xFFFFFFFF                ; Datafill
 133                 DCD     0xFFFFFFFF                ; Datafill
 134                 DCD     0xFFFFFFFF                ; Datafill
 135                 DCD     0xFFFFFFFF                ; Datafill
 136                 DCD     0xFFFFFFFF                ; Datafill
 137                 DCD     0xFFFFFFFF                ; Datafill
 138
 139                 DCD     0xFFFFFFFF                ; Datafill
 140                 DCD     0xFFFFFFFF                ; Datafill
 141                 DCD     0xFFFFFFFF                ; Datafill
 142                 DCD     0xFFFFFFFF                ; Datafill
 143                 DCD     0xFFFFFFFF                ; Datafill
 144                 DCD     0xFFFFFFFF                ; Datafill
 145                 DCD     0xFFFFFFFF                ; Datafill
 146                 DCD     0xFFFFFFFF                ; Datafill
 147                 DCD     0xFFFFFFFF                ; Datafill
 148                 DCD     0xFFFFFFFF                ; Datafill
 149
 150                 DCD     0xFFFFFFFF                ; Datafill
 151                 DCD     0xFFFFFFFF                ; Datafill
 152                 DCD     0xFFFFFFFF                ; Datafill
 153                 DCD     0xFFFFFFFF                ; Datafill
 154                 DCD     0xFFFFFFFF                ; Datafill
 155                 DCD     0xFFFFFFFF                ; Datafill
 156                 DCD     0xFFFFFFFF                ; Datafill
 157                 DCD     0xFFFFFFFF                ; Datafill
 158                 DCD     0xFFFFFFFF                ; Datafill
 159                 DCD     0xFFFFFFFF                ; Datafill
 160
 161                 DCD     0xFFFFFFFF                ; Datafill
 162                 DCD     0xFFFFFFFF                ; Datafill
 163                 DCD     0xFFFFFFFF                ; Datafill
 164                 DCD     0xFFFFFFFF                ; Datafill
 165                 DCD     0xFFFFFFFF                ; Datafill
 166                 DCD     0xFFFFFFFF                ; Datafill
 167                 DCD     0xFFFFFFFF                ; Datafill
 168                 DCD     0xFFFFFFFF                ; Datafill
 169                 DCD     0xFFFFFFFF                ; Datafill
 170                 DCD     0xFFFFFFFF                ; Datafill
 171
 172                 IF      :LNOT::DEF:NO_CRP
 173                 AREA    |.ARM.__at_0x02FC|, CODE, READONLY
 174 CRP_Key         DCD     0xFFFFFFFF
 175                 ENDIF
 176
 177                 AREA    |.text|, CODE, READONLY
 178
 179
 180 ; Reset Handler
 181
 182 Reset_Handler   PROC
 183                 EXPORT  Reset_Handler             [WEAK]
 184                 IMPORT  SystemInit
 185                 IMPORT  __main
 186                 LDR     R0, =SystemInit
 187                 BLX     R0
 188                 LDR     R0, =__main
 189                 BX      R0
 190                 ENDP
 191
 192 ; Dummy Exception Handlers (infinite loops which can be modified)
 193
 194 ; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
 195 ; for particular peripheral.
 196 ;NMI_Handler     PROC
 197 ;                EXPORT  NMI_Handler               [WEAK]
 198 ;                B       .
 199 ;                ENDP
 200 HardFault_Handler\
 201                 PROC
 202                 EXPORT  HardFault_Handler         [WEAK]
 203                 B       .
 204                 ENDP
 205 SVC_Handler     PROC
 206                 EXPORT  SVC_Handler               [WEAK]
 207                 B       .
 208                 ENDP
 209 PendSV_Handler  PROC
 210                 EXPORT  PendSV_Handler            [WEAK]
 211                 B       .
 212                 ENDP
 213 SysTick_Handler PROC
 214                 EXPORT  SysTick_Handler           [WEAK]
 215                 B       .
 216                 ENDP
 217 Reserved_IRQHandler PROC
 218                 EXPORT  Reserved_IRQHandler       [WEAK]
 219                 B       .
 220                 ENDP
 221
 222 Default_Handler PROC
 223 ; for LPC1114
 224                 EXPORT  NMI_Handler               [WEAK]
 225                 EXPORT  SLWU_INT0_IRQHandler      [WEAK]
 226                 EXPORT  SLWU_INT1_IRQHandler      [WEAK]
 227                 EXPORT  SLWU_INT2_IRQHandler      [WEAK]
 228                 EXPORT  SLWU_INT3_IRQHandler      [WEAK]
 229                 EXPORT  SLWU_INT4_IRQHandler      [WEAK]
 230                 EXPORT  SLWU_INT5_IRQHandler      [WEAK]
 231                 EXPORT  SLWU_INT6_IRQHandler      [WEAK]
 232                 EXPORT  SLWU_INT7_IRQHandler      [WEAK]
 233                 EXPORT  SLWU_INT8_IRQHandler      [WEAK]
 234                 EXPORT  SLWU_INT9_IRQHandler      [WEAK]
 235                 EXPORT  SLWU_INT10_IRQHandler     [WEAK]
 236                 EXPORT  SLWU_INT11_IRQHandler     [WEAK]
 237                 EXPORT  SLWU_INT12_IRQHandler     [WEAK]
 238                 EXPORT  C_CAN_IRQHandler          [WEAK]
 239                 EXPORT  SSP1_IRQHandler           [WEAK]
 240                 EXPORT  I2C_IRQHandler            [WEAK]
 241                 EXPORT  TIMER16_0_IRQHandler      [WEAK]
 242                 EXPORT  TIMER16_1_IRQHandler      [WEAK]
 243                 EXPORT  TIMER32_0_IRQHandler      [WEAK]
 244                 EXPORT  TIMER32_1_IRQHandler      [WEAK]
 245                 EXPORT  SSP0_IRQHandler           [WEAK]
 246                 EXPORT  UART_IRQHandler           [WEAK]
 247                 EXPORT  ADC_IRQHandler            [WEAK]
 248                 EXPORT  WDT_IRQHandler            [WEAK]
 249                 EXPORT  BOD_IRQHandler            [WEAK]
 250                 EXPORT  PIO_3_IRQHandler          [WEAK]
 251                 EXPORT  PIO_2_IRQHandler          [WEAK]
 252                 EXPORT  PIO_1_IRQHandler          [WEAK]
 253                 EXPORT  PIO_0_IRQHandler          [WEAK]
 254
 255 NMI_Handler
 256
 257 SLWU_INT0_IRQHandler
 258 SLWU_INT1_IRQHandler
 259 SLWU_INT2_IRQHandler
 260 SLWU_INT3_IRQHandler
 261 SLWU_INT4_IRQHandler
 262 SLWU_INT5_IRQHandler
 263 SLWU_INT6_IRQHandler
 264 SLWU_INT7_IRQHandler
 265 SLWU_INT8_IRQHandler
 266 SLWU_INT9_IRQHandler
 267 SLWU_INT10_IRQHandler
 268 SLWU_INT11_IRQHandler
 269 SLWU_INT12_IRQHandler
 270 C_CAN_IRQHandler
 271 SSP1_IRQHandler
 272 I2C_IRQHandler
 273 TIMER16_0_IRQHandler
 274 TIMER16_1_IRQHandler
 275 TIMER32_0_IRQHandler
 276 TIMER32_1_IRQHandler
 277 SSP0_IRQHandler
 278 UART_IRQHandler
 279 ADC_IRQHandler
 280 WDT_IRQHandler
 281 BOD_IRQHandler
 282 PIO_3_IRQHandler
 283 PIO_2_IRQHandler
 284 PIO_1_IRQHandler
 285 PIO_0_IRQHandler
 286
 287                 B       .
 288
 289                 ENDP
 290
 291                 ALIGN
 292                 END