1 /* File: startup_ARMCM3.s
2 * Purpose: startup file for Cortex-M3/M4 devices. Should use with
3 * GNU Tools for ARM Embedded Processors
7 * Copyright (C) 2011 ARM Limited. All rights reserved.
8 * ARM Limited (ARM) is supplying this software for use with Cortex-M3/M4
9 * processor based microcontrollers. This file can be freely distributed
10 * within development tools that are supporting such ARM based processors.
12 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
13 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
15 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
16 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 The HEAP starts at the end of the DATA section and grows upward.
24 The STACK starts at the end of the RAM and grows downward.
26 The HEAP and stack STACK are only checked at compile time:
27 (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
29 This is just a check for the bare minimum for the Heap+Stack area before
30 aborting compilation, it is not the run time limit:
31 Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
36 .equ Stack_Size, __STACK_SIZE
38 .equ Stack_Size, 0xc00
44 .size __StackLimit, . - __StackLimit
46 .size __StackTop, . - __StackTop
51 .equ Heap_Size, __HEAP_SIZE
59 .size __HeapBase, . - __HeapBase
61 .size __HeapLimit, . - __HeapLimit
67 .long __StackTop /* Top of Stack */
68 .long Reset_Handler /* Reset Handler */
69 .long NMI_Handler /* NMI Handler */
70 .long HardFault_Handler /* Hard Fault Handler */
71 .long MemManage_Handler /* MPU Fault Handler */
72 .long BusFault_Handler /* Bus Fault Handler */
73 .long UsageFault_Handler /* Usage Fault Handler */
74 .long 0 /* Reserved */
75 .long 0 /* Reserved */
76 .long 0 /* Reserved */
77 .long 0 /* Reserved */
78 .long SVC_Handler /* SVCall Handler */
79 .long DebugMon_Handler /* Debug Monitor Handler */
80 .long 0 /* Reserved */
81 .long PendSV_Handler /* PendSV Handler */
82 .long SysTick_Handler /* SysTick Handler */
85 .long PIN_INT0_Handler /* All GPIO pin can be routed to PIN_INTx */
86 .long PIN_INT1_Handler
87 .long PIN_INT2_Handler
88 .long PIN_INT3_Handler
89 .long PIN_INT4_Handler
90 .long PIN_INT5_Handler
91 .long PIN_INT6_Handler
92 .long PIN_INT7_Handler
94 .long GINT1_Handler /* PIO0 (0:7) */
99 .long SSP1_Handler /* SSP1 */
100 .long I2C_Handler /* I2C */
101 .long CT16B0_Handler /* 16-bit Timer0 */
102 .long CT16B1_Handler /* 16-bit Timer1 */
103 .long CT32B0_Handler /* 32-bit Timer0 */
104 .long CT32B1_Handler /* 32-bit Timer1 */
105 .long SSP0_Handler /* SSP0 */
106 .long USART_Handler /* USART */
107 .long USB_Handler /* USB IRQ */
108 .long USB_FIQHandler /* USB FIQ */
109 .long ADC_Handler /* A/D Converter */
110 .long WDT_Handler /* Watchdog timer */
111 .long BOD_Handler /* Brown Out Detect */
112 .long FMC_Handler /* IP2111 Flash Memory Controller */
113 .long OSCFAIL_Handler /* OSC FAIL */
114 .long PVTCIRCUIT_Handler /* PVT CIRCUIT */
115 .long USBWakeup_Handler /* USB wake up */
118 .size __isr_vector, . - __isr_vector
125 .type Reset_Handler, %function
127 /* Loop to copy data from read only memory to RAM. The ranges
128 * of copy from/to are specified by following symbols evaluated in
130 * _etext: End of code section, i.e., begin of data sections to copy from.
131 * __data_start__/__data_end__: RAM address range that data should be
132 * copied to. Both must be aligned to 4 bytes boundary. */
135 ldr r2, =__data_start__
136 ldr r3, =__data_end__
143 blt .Lflash_to_ram_loop
150 .size Reset_Handler, . - Reset_Handler
153 /* Macro to define default handlers. Default handler
154 * will be weak symbol and just dead loops. They can be
155 * overwritten by other handlers */
156 .macro def_default_handler handler_name
160 .type \handler_name, %function
163 .size \handler_name, . - \handler_name
166 def_default_handler NMI_Handler
167 def_default_handler HardFault_Handler
168 def_default_handler MemManage_Handler
169 def_default_handler BusFault_Handler
170 def_default_handler UsageFault_Handler
171 def_default_handler SVC_Handler
172 def_default_handler DebugMon_Handler
173 def_default_handler PendSV_Handler
174 def_default_handler SysTick_Handler
175 def_default_handler Default_Handler
177 .macro def_irq_default_handler handler_name
179 .set \handler_name, Default_Handler
182 def_irq_default_handler PIN_INT0_Handler
183 def_irq_default_handler PIN_INT1_Handler
184 def_irq_default_handler PIN_INT2_Handler
185 def_irq_default_handler PIN_INT3_Handler
186 def_irq_default_handler PIN_INT4_Handler
187 def_irq_default_handler PIN_INT5_Handler
188 def_irq_default_handler PIN_INT6_Handler
189 def_irq_default_handler PIN_INT7_Handler
190 def_irq_default_handler GINT0_Handler
191 def_irq_default_handler GINT1_Handler
192 def_irq_default_handler OSTIMER_Handler
193 def_irq_default_handler SSP1_Handler
194 def_irq_default_handler I2C_Handler
195 def_irq_default_handler CT16B0_Handler
196 def_irq_default_handler CT16B1_Handler
197 def_irq_default_handler CT32B0_Handler
198 def_irq_default_handler CT32B1_Handler
199 def_irq_default_handler SSP0_Handler
200 def_irq_default_handler USART_Handler
201 def_irq_default_handler USB_Handler
202 def_irq_default_handler USB_FIQHandler
203 def_irq_default_handler ADC_Handler
204 def_irq_default_handler WDT_Handler
205 def_irq_default_handler BOD_Handler
206 def_irq_default_handler FMC_Handler
207 def_irq_default_handler OSCFAIL_Handler
208 def_irq_default_handler PVTCIRCUIT_Handler
209 def_irq_default_handler USBWakeup_Handler
210 def_irq_default_handler DEF_IRQHandler