Merge branch 'serial-mouse' of git://github.com/rhaberkorn/tmk_keyboard into rhaberko...
[tmk_keyboard.git] / converter / ps2_usb / config.h
1 /*
2 Copyright 2012 Jun Wako <wakojun@gmail.com>
3
4 This program is free software: you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation, either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #ifndef CONFIG_H
19 #define CONFIG_H
20
21 #include <avr/interrupt.h>
22
23 #define VENDOR_ID 0xFEED
24 #define PRODUCT_ID 0x6512
25 #define DEVICE_VER 0x0001
26 #define MANUFACTURER t.m.k.
27 #define PRODUCT PS/2 keyboard converter
28 #define DESCRIPTION convert PS/2 keyboard to USB
29
30
31 /* matrix size */
32 #define MATRIX_ROWS 32 // keycode bit: 3-0
33 #define MATRIX_COLS 8 // keycode bit: 6-4
34
35
36 /* key combination for command */
37 #define IS_COMMAND() ( \
38 keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) || \
39 keyboard_report->mods == (MOD_BIT(KC_LCTRL) | MOD_BIT(KC_RSHIFT)) \
40 )
41
42
43 //#define NO_SUSPEND_POWER_DOWN
44
45
46 /*
47 * PS/2 Busywait
48 */
49 #ifdef PS2_USE_BUSYWAIT
50 #define PS2_CLOCK_PORT PORTD
51 #define PS2_CLOCK_PIN PIND
52 #define PS2_CLOCK_DDR DDRD
53 #define PS2_CLOCK_BIT 5
54 #define PS2_DATA_PORT PORTD
55 #define PS2_DATA_PIN PIND
56 #define PS2_DATA_DDR DDRD
57 #define PS2_DATA_BIT 2
58 #endif
59
60 /*
61 * PS/2 Pin interrupt
62 */
63 #ifdef PS2_USE_INT
64 /* uses INT1 for clock line(ATMega32U4) */
65 #define PS2_CLOCK_PORT PORTD
66 #define PS2_CLOCK_PIN PIND
67 #define PS2_CLOCK_DDR DDRD
68 #define PS2_CLOCK_BIT 1
69 #define PS2_DATA_PORT PORTD
70 #define PS2_DATA_PIN PIND
71 #define PS2_DATA_DDR DDRD
72 #define PS2_DATA_BIT 0
73 #define PS2_INT_INIT() do { \
74 EICRA |= ((1<<ISC11) | \
75 (0<<ISC10)); \
76 } while (0)
77 #define PS2_INT_ON() do { \
78 EIMSK |= (1<<INT1); \
79 } while (0)
80 #define PS2_INT_OFF() do { \
81 EIMSK &= ~(1<<INT1); \
82 } while (0)
83 #define PS2_INT_VECT INT1_vect
84 #endif
85
86 /*
87 * PS/2 USART
88 */
89 #ifdef PS2_USE_USART
90 #if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__)
91 /* XCK for clock line and RXD for data line */
92 #define PS2_CLOCK_PORT PORTD
93 #define PS2_CLOCK_PIN PIND
94 #define PS2_CLOCK_DDR DDRD
95 #define PS2_CLOCK_BIT 5
96 #define PS2_DATA_PORT PORTD
97 #define PS2_DATA_PIN PIND
98 #define PS2_DATA_DDR DDRD
99 #define PS2_DATA_BIT 2
100 /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
101 /* set DDR of CLOCK as input to be slave */
102 #define PS2_USART_INIT() do { \
103 PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
104 PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
105 UCSR1C = ((1 << UMSEL10) | \
106 (3 << UPM10) | \
107 (0 << USBS1) | \
108 (3 << UCSZ10) | \
109 (0 << UCPOL1)); \
110 UCSR1A = 0; \
111 UBRR1H = 0; \
112 UBRR1L = 0; \
113 } while (0)
114 #define PS2_USART_RX_INT_ON() do { \
115 UCSR1B = ((1 << RXCIE1) | \
116 (1 << RXEN1)); \
117 } while (0)
118 #define PS2_USART_RX_POLL_ON() do { \
119 UCSR1B = (1 << RXEN1); \
120 } while (0)
121 #define PS2_USART_OFF() do { \
122 UCSR1C = 0; \
123 UCSR1B &= ~((1 << RXEN1) | \
124 (1 << TXEN1)); \
125 } while (0)
126 #define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
127 #define PS2_USART_RX_DATA UDR1
128 #define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
129 #define PS2_USART_RX_VECT USART1_RX_vect
130 #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega168P__) || defined(__AVR_ATmega328P__)
131 /* XCK for clock line and RXD for data line */
132 #define PS2_CLOCK_PORT PORTD
133 #define PS2_CLOCK_PIN PIND
134 #define PS2_CLOCK_DDR DDRD
135 #define PS2_CLOCK_BIT 4
136 #define PS2_DATA_PORT PORTD
137 #define PS2_DATA_PIN PIND
138 #define PS2_DATA_DDR DDRD
139 #define PS2_DATA_BIT 0
140 /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
141 /* set DDR of CLOCK as input to be slave */
142 #define PS2_USART_INIT() do { \
143 PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
144 PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
145 UCSR0C = ((1 << UMSEL00) | \
146 (3 << UPM00) | \
147 (0 << USBS0) | \
148 (3 << UCSZ00) | \
149 (0 << UCPOL0)); \
150 UCSR0A = 0; \
151 UBRR0H = 0; \
152 UBRR0L = 0; \
153 } while (0)
154 #define PS2_USART_RX_INT_ON() do { \
155 UCSR0B = ((1 << RXCIE0) | \
156 (1 << RXEN0)); \
157 } while (0)
158 #define PS2_USART_RX_POLL_ON() do { \
159 UCSR0B = (1 << RXEN0); \
160 } while (0)
161 #define PS2_USART_OFF() do { \
162 UCSR0C = 0; \
163 UCSR0B &= ~((1 << RXEN0) | \
164 (1 << TXEN0)); \
165 } while (0)
166 #define PS2_USART_RX_READY (UCSR0A & (1<<RXC0))
167 #define PS2_USART_RX_DATA UDR0
168 #define PS2_USART_ERROR (UCSR0A & ((1<<FE0) | (1<<DOR0) | (1<<UPE0)))
169 #define PS2_USART_RX_VECT USART_RX_vect
170 #endif
171 #endif
172
173 #ifdef SERIAL_MOUSE_MICROSOFT
174 /*
175 * Serial(USART) configuration (for Microsoft serial mice)
176 * asynchronous, positive logic, 1200baud, bit order: LSB first
177 * 1-start bit, 7-data bit, no parity, 1-stop bit
178 */
179 #define SERIAL_UART_BAUD 1200
180 #define SERIAL_UART_DATA UDR1
181 #define SERIAL_UART_UBRR ((F_CPU/(16UL*SERIAL_UART_BAUD))-1)
182 #define SERIAL_UART_RXD_VECT USART1_RX_vect
183 #define SERIAL_UART_TXD_READY (UCSR1A&(1<<UDRE1))
184 #define SERIAL_UART_INIT() do { \
185 UBRR1L = (uint8_t) SERIAL_UART_UBRR; /* baud rate */ \
186 UBRR1H = (uint8_t) (SERIAL_UART_UBRR>>8); /* baud rate */ \
187 UCSR1B |= (1<<RXCIE1) | (1<<RXEN1); /* RX interrupt, RX: enable */ \
188 UCSR1C = (1<<UCSZ11) | (0<<UCSZ10); /* no parity, 1 stop bit, 7-bit characters */ \
189 sei(); \
190 } while(0)
191 #elif defined(SERIAL_MOUSE_MOUSESYSTEMS)
192 /*
193 * Serial(USART) configuration (for Mousesystems serial mice)
194 * asynchronous, positive logic, 1200baud, bit order: LSB first
195 * 1-start bit, 8-data bit, no parity, 1-stop bit
196 */
197 #define SERIAL_UART_BAUD 1200
198 #define SERIAL_UART_DATA UDR1
199 #define SERIAL_UART_UBRR ((F_CPU/(16UL*SERIAL_UART_BAUD))-1)
200 #define SERIAL_UART_RXD_VECT USART1_RX_vect
201 #define SERIAL_UART_TXD_READY (UCSR1A&(1<<UDRE1))
202 #define SERIAL_UART_INIT() do { \
203 UBRR1L = (uint8_t) SERIAL_UART_UBRR; /* baud rate */ \
204 UBRR1H = (uint8_t) (SERIAL_UART_UBRR>>8); /* baud rate */ \
205 UCSR1B |= (1<<RXCIE1) | (1<<RXEN1); /* RX interrupt, RX: enable */ \
206 UCSR1C = (1<<UCSZ11) | (1<<UCSZ10); /* no parity, 1 stop bit, 8-bit characters */ \
207 sei(); \
208 } while(0)
209 #endif
210
211 #endif
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