Add USE_LEGACY_KEYMAP in config.h of ps2_usb and IIgs
[tmk_keyboard.git] / converter / ps2_usb / config.h
1 /*
2 Copyright 2012 Jun Wako <wakojun@gmail.com>
3
4 This program is free software: you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation, either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #ifndef CONFIG_H
19 #define CONFIG_H
20
21 #include <avr/interrupt.h>
22
23 #define VENDOR_ID 0xFEED
24 #define PRODUCT_ID 0x6512
25 #define MANUFACTURER t.m.k.
26 #define PRODUCT PS/2 keyboard converter
27 #define DESCRIPTION convert PS/2 keyboard to USB
28
29
30 /* matrix size */
31 #define MATRIX_ROWS 32 // keycode bit: 3-0
32 #define MATRIX_COLS 8 // keycode bit: 6-4
33
34
35 /* key combination for command */
36 #define IS_COMMAND() ( \
37 keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) || \
38 keyboard_report->mods == (MOD_BIT(KC_LCTRL) | MOD_BIT(KC_RSHIFT)) \
39 )
40
41
42 /* legacy keymap support */
43 #define USE_LEGACY_KEYMAP
44
45
46 #ifdef PS2_USE_USART
47 #if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__)
48 /* XCK for clock line and RXD for data line */
49 #define PS2_CLOCK_PORT PORTD
50 #define PS2_CLOCK_PIN PIND
51 #define PS2_CLOCK_DDR DDRD
52 #define PS2_CLOCK_BIT 5
53 #define PS2_DATA_PORT PORTD
54 #define PS2_DATA_PIN PIND
55 #define PS2_DATA_DDR DDRD
56 #define PS2_DATA_BIT 2
57
58 /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
59 /* set DDR of CLOCK as input to be slave */
60 #define PS2_USART_INIT() do { \
61 PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
62 PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
63 UCSR1C = ((1 << UMSEL10) | \
64 (3 << UPM10) | \
65 (0 << USBS1) | \
66 (3 << UCSZ10) | \
67 (0 << UCPOL1)); \
68 UCSR1A = 0; \
69 UBRR1H = 0; \
70 UBRR1L = 0; \
71 } while (0)
72 #define PS2_USART_RX_INT_ON() do { \
73 UCSR1B = ((1 << RXCIE1) | \
74 (1 << RXEN1)); \
75 } while (0)
76 #define PS2_USART_RX_POLL_ON() do { \
77 UCSR1B = (1 << RXEN1); \
78 } while (0)
79 #define PS2_USART_OFF() do { \
80 UCSR1C = 0; \
81 UCSR1B &= ~((1 << RXEN1) | \
82 (1 << TXEN1)); \
83 } while (0)
84 #define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
85 #define PS2_USART_RX_DATA UDR1
86 #define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
87 #define PS2_USART_RX_VECT USART1_RX_vect
88
89 #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega168P__) || defined(__AVR_ATmega328P__)
90 /* XCK for clock line and RXD for data line */
91 #define PS2_CLOCK_PORT PORTD
92 #define PS2_CLOCK_PIN PIND
93 #define PS2_CLOCK_DDR DDRD
94 #define PS2_CLOCK_BIT 4
95 #define PS2_DATA_PORT PORTD
96 #define PS2_DATA_PIN PIND
97 #define PS2_DATA_DDR DDRD
98 #define PS2_DATA_BIT 0
99
100 /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
101 /* set DDR of CLOCK as input to be slave */
102 #define PS2_USART_INIT() do { \
103 PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
104 PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
105 UCSR0C = ((1 << UMSEL00) | \
106 (3 << UPM00) | \
107 (0 << USBS0) | \
108 (3 << UCSZ00) | \
109 (0 << UCPOL0)); \
110 UCSR0A = 0; \
111 UBRR0H = 0; \
112 UBRR0L = 0; \
113 } while (0)
114 #define PS2_USART_RX_INT_ON() do { \
115 UCSR0B = ((1 << RXCIE0) | \
116 (1 << RXEN0)); \
117 } while (0)
118 #define PS2_USART_RX_POLL_ON() do { \
119 UCSR0B = (1 << RXEN0); \
120 } while (0)
121 #define PS2_USART_OFF() do { \
122 UCSR0C = 0; \
123 UCSR0B &= ~((1 << RXEN0) | \
124 (1 << TXEN0)); \
125 } while (0)
126 #define PS2_USART_RX_READY (UCSR0A & (1<<RXC0))
127 #define PS2_USART_RX_DATA UDR0
128 #define PS2_USART_ERROR (UCSR0A & ((1<<FE0) | (1<<DOR0) | (1<<UPE0)))
129 #define PS2_USART_RX_VECT USART_RX_vect
130 #endif
131 #endif
132
133
134 #ifdef PS2_USE_INT
135 /* uses INT1 for clock line(ATMega32U4) */
136 #define PS2_CLOCK_PORT PORTD
137 #define PS2_CLOCK_PIN PIND
138 #define PS2_CLOCK_DDR DDRD
139 #define PS2_CLOCK_BIT 1
140 #define PS2_DATA_PORT PORTD
141 #define PS2_DATA_PIN PIND
142 #define PS2_DATA_DDR DDRD
143 #define PS2_DATA_BIT 2
144
145 #define PS2_INT_INIT() do { \
146 EICRA |= ((1<<ISC11) | \
147 (0<<ISC10)); \
148 } while (0)
149 #define PS2_INT_ON() do { \
150 EIMSK |= (1<<INT1); \
151 } while (0)
152 #define PS2_INT_OFF() do { \
153 EIMSK &= ~(1<<INT1); \
154 } while (0)
155 #define PS2_INT_VECT INT1_vect
156 #endif
157
158
159 #ifdef PS2_USE_BUSYWAIT
160 #define PS2_CLOCK_PORT PORTF
161 #define PS2_CLOCK_PIN PINF
162 #define PS2_CLOCK_DDR DDRF
163 #define PS2_CLOCK_BIT 0
164 #define PS2_DATA_PORT PORTF
165 #define PS2_DATA_PIN PINF
166 #define PS2_DATA_DDR DDRF
167 #define PS2_DATA_BIT 1
168 #endif
169
170 #endif
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