converter/ps2_usb/config.h

   1 /*
   2 Copyright 2012 Jun Wako <wakojun@gmail.com>
   3
   4 This program is free software: you can redistribute it and/or modify
   5 it under the terms of the GNU General Public License as published by
   6 the Free Software Foundation, either version 2 of the License, or
   7 (at your option) any later version.
   8
   9 This program is distributed in the hope that it will be useful,
  10 but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 GNU General Public License for more details.
  13
  14 You should have received a copy of the GNU General Public License
  15 along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16 */
  17
  18 #ifndef CONFIG_H
  19 #define CONFIG_H
  20
  21 #include <avr/interrupt.h>
  22 /* controller configuration */
  23 #include "controller_teensy.h"
  24
  25 #define VENDOR_ID       0xFEED
  26 #define PRODUCT_ID      0x6512
  27 #define MANUFACTURER    t.m.k.
  28 #define PRODUCT         PS/2 keyboard converter
  29 #define DESCRIPTION     convert PS/2 keyboard to USB
  30
  31
  32 /* matrix size */
  33 #define MATRIX_ROWS 32  // keycode bit: 3-0
  34 #define MATRIX_COLS 8   // keycode bit: 6-4
  35
  36
  37 /* key combination for command */
  38 #define IS_COMMAND() ( \
  39     keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) || \
  40     keyboard_report->mods == (MOD_BIT(KC_LCTRL) | MOD_BIT(KC_RSHIFT)) \
  41 )
  42
  43
  44 /* mouse keys */
  45 #ifdef MOUSEKEY_ENABLE
  46 #   define MOUSEKEY_DELAY_TIME 255
  47 #endif
  48
  49
  50 #ifdef PS2_USE_USART
  51 #if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__)
  52 /* XCK for clock line and RXD for data line */
  53 #define PS2_CLOCK_PORT  PORTD
  54 #define PS2_CLOCK_PIN   PIND
  55 #define PS2_CLOCK_DDR   DDRD
  56 #define PS2_CLOCK_BIT   5
  57 #define PS2_DATA_PORT   PORTD
  58 #define PS2_DATA_PIN    PIND
  59 #define PS2_DATA_DDR    DDRD
  60 #define PS2_DATA_BIT    2
  61
  62 /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
  63 /* set DDR of CLOCK as input to be slave */
  64 #define PS2_USART_INIT() do {   \
  65     PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT);   \
  66     PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT);     \
  67     UCSR1C = ((1 << UMSEL10) |  \
  68               (3 << UPM10)   |  \
  69               (0 << USBS1)   |  \
  70               (3 << UCSZ10)  |  \
  71               (0 << UCPOL1));   \
  72     UCSR1A = 0;                 \
  73     UBRR1H = 0;                 \
  74     UBRR1L = 0;                 \
  75 } while (0)
  76 #define PS2_USART_RX_INT_ON() do {  \
  77     UCSR1B = ((1 << RXCIE1) |       \
  78               (1 << RXEN1));        \
  79 } while (0)
  80 #define PS2_USART_RX_POLL_ON() do { \
  81     UCSR1B = (1 << RXEN1);          \
  82 } while (0)
  83 #define PS2_USART_OFF() do {    \
  84     UCSR1C = 0;                 \
  85     UCSR1B &= ~((1 << RXEN1) |  \
  86                 (1 << TXEN1));  \
  87 } while (0)
  88 #define PS2_USART_RX_READY      (UCSR1A & (1<<RXC1))
  89 #define PS2_USART_RX_DATA       UDR1
  90 #define PS2_USART_ERROR         (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
  91 #define PS2_USART_RX_VECT       USART1_RX_vect
  92
  93 #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega168P__) || defined(__AVR_ATmega328P__)
  94 /* XCK for clock line and RXD for data line */
  95 #define PS2_CLOCK_PORT  PORTD
  96 #define PS2_CLOCK_PIN   PIND
  97 #define PS2_CLOCK_DDR   DDRD
  98 #define PS2_CLOCK_BIT   4
  99 #define PS2_DATA_PORT   PORTD
 100 #define PS2_DATA_PIN    PIND
 101 #define PS2_DATA_DDR    DDRD
 102 #define PS2_DATA_BIT    0
 103
 104 /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
 105 /* set DDR of CLOCK as input to be slave */
 106 #define PS2_USART_INIT() do {   \
 107     PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT);   \
 108     PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT);     \
 109     UCSR0C = ((1 << UMSEL00) |  \
 110               (3 << UPM00)   |  \
 111               (0 << USBS0)   |  \
 112               (3 << UCSZ00)  |  \
 113               (0 << UCPOL0));   \
 114     UCSR0A = 0;                 \
 115     UBRR0H = 0;                 \
 116     UBRR0L = 0;                 \
 117 } while (0)
 118 #define PS2_USART_RX_INT_ON() do {  \
 119     UCSR0B = ((1 << RXCIE0) |       \
 120               (1 << RXEN0));        \
 121 } while (0)
 122 #define PS2_USART_RX_POLL_ON() do { \
 123     UCSR0B = (1 << RXEN0);          \
 124 } while (0)
 125 #define PS2_USART_OFF() do {    \
 126     UCSR0C = 0;                 \
 127     UCSR0B &= ~((1 << RXEN0) |  \
 128                 (1 << TXEN0));  \
 129 } while (0)
 130 #define PS2_USART_RX_READY      (UCSR0A & (1<<RXC0))
 131 #define PS2_USART_RX_DATA       UDR0
 132 #define PS2_USART_ERROR         (UCSR0A & ((1<<FE0) | (1<<DOR0) | (1<<UPE0)))
 133 #define PS2_USART_RX_VECT       USART_RX_vect
 134 #endif
 135 #endif
 136
 137
 138 #ifdef PS2_USE_INT
 139 /* uses INT1 for clock line(ATMega32U4) */
 140 #define PS2_CLOCK_PORT  PORTD
 141 #define PS2_CLOCK_PIN   PIND
 142 #define PS2_CLOCK_DDR   DDRD
 143 #define PS2_CLOCK_BIT   1
 144 #define PS2_DATA_PORT   PORTD
 145 #define PS2_DATA_PIN    PIND
 146 #define PS2_DATA_DDR    DDRD
 147 #define PS2_DATA_BIT    2
 148
 149 #define PS2_INT_INIT()  do {    \
 150     EICRA |= ((1<<ISC11) |      \
 151               (0<<ISC10));      \
 152 } while (0)
 153 #define PS2_INT_ON()  do {      \
 154     EIMSK |= (1<<INT1);         \
 155 } while (0)
 156 #define PS2_INT_OFF() do {      \
 157     EIMSK &= ~(1<<INT1);        \
 158 } while (0)
 159 #define PS2_INT_VECT    INT1_vect
 160 #endif
 161
 162
 163 #ifdef PS2_USE_BUSYWAIT
 164 #define PS2_CLOCK_PORT  PORTF
 165 #define PS2_CLOCK_PIN   PINF
 166 #define PS2_CLOCK_DDR   DDRF
 167 #define PS2_CLOCK_BIT   0
 168 #define PS2_DATA_PORT   PORTF
 169 #define PS2_DATA_PIN    PINF
 170 #define PS2_DATA_DDR    DDRF
 171 #define PS2_DATA_BIT    1
 172 #endif
 173
 174 #endif