/* ---------------------------------------------------------------------- * Copyright (C) 2010-2013 ARM Limited. All rights reserved. * * $Date: 17. January 2013 * $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_biquad_cascade_df1_f32.c * * Description: Processing function for the * floating-point Biquad cascade DirectFormI(DF1) filter. * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * - Neither the name of ARM LIMITED nor the names of its contributors * may be used to endorse or promote products derived from this * software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" /** * @ingroup groupFilters */ /** * @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure * * This set of functions implements arbitrary order recursive (IIR) filters. * The filters are implemented as a cascade of second order Biquad sections. * The functions support Q15, Q31 and floating-point data types. * Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3. * * The functions operate on blocks of input and output data and each call to the function * processes blockSize samples through the filter. * pSrc points to the array of input data and * pDst points to the array of output data. * Both arrays contain blockSize values. * * \par Algorithm * Each Biquad stage implements a second order filter using the difference equation: * 
    
 *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
 *
* A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage. * \image html Biquad.gif "Single Biquad filter stage" * Coefficients b0, b1 and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. * Pay careful attention to the sign of the feedback coefficients. * Some design tools use the difference equation * 
    
 *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
 *
* In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library. * * \par * Higher order filters are realized as a cascade of second order sections. * numStages refers to the number of second order stages used. * For example, an 8th order filter would be realized with numStages=4 second order stages. * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages" * A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0). * * \par * The pState points to state variables array. * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. * The state variables are arranged in the pState array as: * 
    
 *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
 *
* * \par * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. * The state array has a total length of 4*numStages values. * The state variables are updated after each block of data is processed, the coefficients are untouched. * * \par Instance Structure * The coefficients and state variables for a filter are stored together in an instance data structure. * A separate instance structure must be defined for each filter. * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. * There are separate instance structure declarations for each of the 3 supported data types. * * \par Init Functions * There is also an associated initialization function for each data type. * The initialization function performs following operations: * - Sets the values of the internal structure fields. * - Zeros out the values in the state buffer. * To do this manually without calling the init function, assign the follow subfields of the instance structure: * numStages, pCoeffs, pState. Also set all of the values in pState to zero. * * \par * Use of the initialization function is optional. * However, if the initialization function is used, then the instance structure cannot be placed into a const data section. * To place an instance structure into a const data section, the instance structure must be manually initialized. * Set the values in the state buffer to zeros before static initialization. * The code below statically initializes each of the 3 different data type filter instance structures * 
    
 *     arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};    
 *     arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};    
 *     arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};    
 *
* where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer; * pCoeffs is the address of the coefficient buffer; postShift shift to be applied. * * \par Fixed-Point Behavior * Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions. * Following issues must be considered: * - Scaling of coefficients * - Filter gain * - Overflow and saturation * * \par * Scaling of coefficients: * Filter coefficients are represented as fractional values and * coefficients are restricted to lie in the range [-1 +1). * The fixed-point functions have an additional scaling parameter postShift * which allow the filter coefficients to exceed the range [+1 -1). * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator" * This essentially scales the filter coefficients by 2^postShift. * For example, to realize the coefficients * 
    
 *    {1.5, -0.8, 1.2, 1.6, -0.9}    
 *
* set the pCoeffs array to: * 
    
 *    {0.75, -0.4, 0.6, 0.8, -0.45}    
 *
* and set postShift=1 * * \par * Filter gain: * The frequency response of a Biquad filter is a function of its coefficients. * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter. * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed. * * \par * Overflow and saturation: * For Q15 and Q31 versions, it is described separately as part of the function specific documentation below. */ /** * @addtogroup BiquadCascadeDF1 * @{ */ /** * @param[in] *S points to an instance of the floating-point Biquad cascade structure. * @param[in] *pSrc points to the block of input data. * @param[out] *pDst points to the block of output data. * @param[in] blockSize number of samples to process per call. * @return none. * */ void arm_biquad_cascade_df1_f32( const arm_biquad_casd_df1_inst_f32 * S, float32_t * pSrc, float32_t * pDst, uint32_t blockSize) { float32_t *pIn = pSrc; /* source pointer */ float32_t *pOut = pDst; /* destination pointer */ float32_t *pState = S->pState; /* pState pointer */ float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ float32_t acc; /* Simulates the accumulator */ float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ float32_t Xn; /* temporary input */ uint32_t sample, stage = S->numStages; /* loop counters */ #ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ do { /* Reading the coefficients */ b0 = *pCoeffs++; b1 = *pCoeffs++; b2 = *pCoeffs++; a1 = *pCoeffs++; a2 = *pCoeffs++; /* Reading the pState values */ Xn1 = pState[0]; Xn2 = pState[1]; Yn1 = pState[2]; Yn2 = pState[3]; /* Apply loop unrolling and compute 4 output values simultaneously. */ /* The variable acc hold output values that are being computed: * * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ sample = blockSize >> 2u; /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(sample > 0u) { /* Read the first input */ Xn = *pIn++; /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); /* Store the result in the accumulator in the destination buffer. */ *pOut++ = Yn2; /* Every time after the output is computed state should be updated. */ /* The states should be updated as: */ /* Xn2 = Xn1 */ /* Xn1 = Xn */ /* Yn2 = Yn1 */ /* Yn1 = acc */ /* Read the second input */ Xn2 = *pIn++; /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1); /* Store the result in the accumulator in the destination buffer. */ *pOut++ = Yn1; /* Every time after the output is computed state should be updated. */ /* The states should be updated as: */ /* Xn2 = Xn1 */ /* Xn1 = Xn */ /* Yn2 = Yn1 */ /* Yn1 = acc */ /* Read the third input */ Xn1 = *pIn++; /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2); /* Store the result in the accumulator in the destination buffer. */ *pOut++ = Yn2; /* Every time after the output is computed state should be updated. */ /* The states should be updated as: */ /* Xn2 = Xn1 */ /* Xn1 = Xn */ /* Yn2 = Yn1 */ /* Yn1 = acc */ /* Read the forth input */ Xn = *pIn++; /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1); /* Store the result in the accumulator in the destination buffer. */ *pOut++ = Yn1; /* Every time after the output is computed state should be updated. */ /* The states should be updated as: */ /* Xn2 = Xn1 */ /* Xn1 = Xn */ /* Yn2 = Yn1 */ /* Yn1 = acc */ Xn2 = Xn1; Xn1 = Xn; /* decrement the loop counter */ sample--; } /* If the blockSize is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ sample = blockSize & 0x3u; while(sample > 0u) { /* Read the input */ Xn = *pIn++; /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); /* Store the result in the accumulator in the destination buffer. */ *pOut++ = acc; /* Every time after the output is computed state should be updated. */ /* The states should be updated as: */ /* Xn2 = Xn1 */ /* Xn1 = Xn */ /* Yn2 = Yn1 */ /* Yn1 = acc */ Xn2 = Xn1; Xn1 = Xn; Yn2 = Yn1; Yn1 = acc; /* decrement the loop counter */ sample--; } /* Store the updated state variables back into the pState array */ *pState++ = Xn1; *pState++ = Xn2; *pState++ = Yn1; *pState++ = Yn2; /* The first stage goes from the input buffer to the output buffer. */ /* Subsequent numStages occur in-place in the output buffer */ pIn = pDst; /* Reset the output pointer */ pOut = pDst; /* decrement the loop counter */ stage--; } while(stage > 0u); #else /* Run the below code for Cortex-M0 */ do { /* Reading the coefficients */ b0 = *pCoeffs++; b1 = *pCoeffs++; b2 = *pCoeffs++; a1 = *pCoeffs++; a2 = *pCoeffs++; /* Reading the pState values */ Xn1 = pState[0]; Xn2 = pState[1]; Yn1 = pState[2]; Yn2 = pState[3]; /* The variables acc holds the output value that is computed: * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ sample = blockSize; while(sample > 0u) { /* Read the input */ Xn = *pIn++; /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2); /* Store the result in the accumulator in the destination buffer. */ *pOut++ = acc; /* Every time after the output is computed state should be updated. */ /* The states should be updated as: */ /* Xn2 = Xn1 */ /* Xn1 = Xn */ /* Yn2 = Yn1 */ /* Yn1 = acc */ Xn2 = Xn1; Xn1 = Xn; Yn2 = Yn1; Yn1 = acc; /* decrement the loop counter */ sample--; } /* Store the updated state variables back into the pState array */ *pState++ = Xn1; *pState++ = Xn2; *pState++ = Yn1; *pState++ = Yn2; /* The first stage goes from the input buffer to the output buffer. */ /* Subsequent numStages occur in-place in the output buffer */ pIn = pDst; /* Reset the output pointer */ pOut = pDst; /* decrement the loop counter */ stage--; } while(stage > 0u); #endif /* #ifndef ARM_MATH_CM0_FAMILY */ } /** * @} end of BiquadCascadeDF1 group */