mbed patch for Infinity ----------------------- Without ld script patch vector table it doesn't place vector table in binary file. And clock setting is changed as Infinity uses internal oscillator instead of exteranl crystal. diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld index 600751c..55c3393 100644 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld @@ -43,7 +43,7 @@ SECTIONS .isr_vector : { __vector_table = .; - KEEP(*(.vector_table)) + KEEP(*(.isr_vector)) *(.text.Reset_Handler) *(.text.System_Init) . = ALIGN(4); diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c index 393d1f0..b78b71a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c @@ -44,7 +44,7 @@ #define DISABLE_WDOG 1 -#define CLOCK_SETUP 1 +#define CLOCK_SETUP 0 /* Predefined clock setups 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode Reference clock source for MCG module is the slow internal clock source 32.768kHz CMSIS/mbed HAL ============== http://developer.mbed.org/users/MACRUM/notebook/mbed-library-internals/ api/ mbed API ├── AnalogIn.h ├── AnalogOut.h ├── BusIn.h ├── BusInOut.h ├── BusOut.h ├── CallChain.h ├── CAN.h ├── can_helper.h ├── DigitalIn.h ├── DigitalInOut.h ├── DigitalOut.h ├── DirHandle.h ├── Ethernet.h ├── FileBase.h ├── FileHandle.h ├── FileLike.h ├── FilePath.h ├── FileSystemLike.h ├── FunctionPointer.h ├── I2C.h ├── I2CSlave.h ├── InterruptIn.h ├── InterruptManager.h ├── LocalFileSystem.h ├── mbed_assert.h ├── mbed_debug.h ├── mbed_error.h ├── mbed.h ├── mbed_interface.h ├── platform.h ├── PortIn.h ├── PortInOut.h ├── PortOut.h ├── PwmOut.h ├── RawSerial.h ├── rtc_time.h ├── semihost_api.h ├── SerialBase.h ├── Serial.h ├── SPI.h ├── SPISlave.h ├── Stream.h ├── Ticker.h ├── Timeout.h ├── TimerEvent.h ├── Timer.h ├── toolchain.h └── wait_api.h common/ mbed API implementation hal/ mbed HAL implementation interface ├── analogin_api.h ├── analogout_api.h ├── can_api.h ├── ethernet_api.h ├── gpio_api.h ├── gpio_irq_api.h ├── i2c_api.h ├── pinmap.h ├── port_api.h ├── pwmout_api.h ├── rtc_api.h ├── serial_api.h ├── sleep_api.h ├── spi_api.h └── us_ticker_api.h targets/hal/TARGET_/TARGET_/ mbed HAL implementation targets/cmsis/ CMSIS interface core_caInstr.h core_ca9.h core_cmFunc.h core_caFunc.h core_cmInstr.h core_cm4_simd.h core_ca_mmu.h core_cm0.h core_cm0plus.h core_cm3.h core_cm4.h targets/cmsis/TARGET_/TARGET_/ .h system_.[ch] cmsis.h　 cmsis_nvic.[ch] targets/cmsis/TARGET_/TARGET_/TOOLSCHAIN_/ startup_.s linker-script Infinity ======== Massdrop Infinity Keyboard: https://www.massdrop.com/buy/infinity-keyboard-kit Freescale MK20DX128VLF5 48-QFP: http://cache.freescale.com/files/32bit/doc/data_sheet/K20P48M50SF0.pdf kiibohd controller(MD1): https://github.com/kiibohd/controller DFU bootloader: https://github.com/kiibohd/controller/tree/master/Bootloader Program with bootloader: $ dfu-util -D kiibohd.dfu.bin Pinout: https://github.com/kiibohd/controller/blob/master/Scan/MD1/pinout Pin Usage ========= mk20dx128vlf5 ---- |Keys| ---- * Strobe (Columns) PTB0 PTB1 PTB2 PTB3 PTB16 PTB17 PTC4 PTC5 PTD0 * Sense (Rows) PTD1 PTD2 PTD3 PTD4 PTD5 PTD6 PTD7 ----- |Debug| ----- * SWD PTA0 (Pull-down) PTA3 (Pull-up) * LEDs PTA19 (LED only for PCB, not McHCK) (XTAL) * UARTs PTA1 - RX0 PTA2 - TX0 ------ |Unused| ------ * GPIO PTA1 (Not broken out on PCB, available on McHCK) (Pull-up) PTA2 (") PTA4 (Pull-up) PTA18 (EXTAL) PTC0 PTC1 PTC2 PTC3 PTC6 PTC7 * Analog ADC0_DP0 ADC0_DM0 Freescale kinetis MK20DX128 =========================== If FSEC of flash config at 0x400-40F is changed accidentally SWD/JTAG debug access will be lost and very difficult to get back. For example, high level adapter like stlink cannot work to get access back after FSEC is changed. To regain the chip to be programmable low level DAP inteface like JTAG, CMSIS-DAP or OpenSAD. Memory map ========== kiibohd bootloader: Lib/mk20dx128vlf5.bootloader.ld 0x0000_0000 +-------------------+ -----------------+---------------+ | .vectors | ---------. | StackPointer0 | | .startup | \ | ResetHandler1 | | .rodata | \ | ... | 0x0000_0400 | .flashconfig | 0x10 \ | ... | | .text | \ | ... 61 | 0xF7 | .init | `--+---------------+ 0xF8 0x0000_1000 +-------------------+ 4KB | _app_rom | ~ ~ ~ ~ | | 0x07FF_FFFF +-------------------+ 128KB 0x1FFF_E000 +-------------------+ | | | RAM | | 8KB| 0x2000_0000 +-------------------+ | | | RAM | | 8KB| 0x2000_2000 +-------------------+ _estack OpenOCD ======== Synopsis of SWD, JTAG and SWJ-DP transport: https://fedcsis.org/proceedings/2012/pliks/279.pdf OpenSDA Freescale: Mass storage bootloader & serial port; part of CMSIS-DAP? http://cache.freescale.com/files/32bit/doc/user_guide/OPENSDAUG.pdf interface_list: 1: ftdi 2: usb_blaster 3: usbprog 4: jlink 5: vsllink 6: rlink 7: ulink 8: arm-jtag-ew 9: hla 10: osbdm 11: opendous 12: aice 13: cmsis-dap transport list: stlink_swim hla_jtag hla_swd aice_jtag swd cmsis-dap jtag target types: arm7tdmi arm9tdmi arm920t arm720t arm966e arm946e arm926ejs fa526 feroceon dragonite xscale cortex_m cortex_a cortex_r4 arm11 mips_m4k avr dsp563xx dsp5680xx testee avr32_ap7k hla_target nds32_v2 nds32_v3 nds32_v3m or1k quark_x10xx TAP --- http://openocd.sourceforge.net/doc/html/TAP-Declaration.html#TAP-Declaration jtag newtap chipname tapname configparams... hla newtap chipname tapname configparams... swd newtap chipname tapname configparams... cmsis-dap newtap chipname tapname configparams... The tapname reflects the role of that TAP, and should follow this convention: bs – For boundary scan if this is a separate TAP; cpu – The main CPU of the chip, alternatively arm and dsp on chips with both ARM and DSP CPUs, arm1 and arm2 on chips with two ARMs, and so forth; etb – For an embedded trace buffer (example: an ARM ETB11); flash – If the chip has a flash TAP, like the str912; jrc – For JTAG route controller (example: the ICEPick modules on many Texas Instruments chips, like the OMAP3530 on Beagleboards); tap – Should be used only for FPGA- or CPLD-like devices with a single TAP; unknownN – If you have no idea what the TAP is for (N is a number); when in doubt – Use the chip maker's name in their data sheet. For example, the Freescale i.MX31 has a SDMA (Smart DMA) with a JTAG TAP; that TAP should be named sdma. -irlen NUMBER The length in bits of the instruction register, such as 4 or 5 bits. Target ------ http://openocd.sourceforge.net/doc/html/CPU-Configuration.html#CPU-Configuration target create target_name type configparams... $target_name configure configparams... -chain-position dotted.name – names the TAP used to access this target. -endian (big|little) – specifies whether the CPU uses big or little endian conventions -event event_name event_body – See Target Events. Note that this updates a list of named event handlers. Calling this twice with two different event names assigns two different handlers, but calling it twice with the same event name assigns only one handler. -work-area-backup (0|1) – says whether the work area gets backed up; by default, it is not backed up. When possible, use a working_area that doesn't need to be backed up, since performing a backup slows down operations. For example, the beginning of an SRAM block is likely to be used by most build systems, but the end is often unused. -work-area-size size – specify work are size, in bytes. The same size applies regardless of whether its physical or virtual address is being used. -work-area-phys address – set the work area base address to be used when no MMU is active. -work-area-virt address – set the work area base address to be used when an MMU is active. Do not specify a value for this except on targets with an MMU. The value should normally correspond to a static mapping for the -work-area-phys address, set up by the current operating system. -rtos rtos_type – enable rtos support for target, rtos_type can be one of auto|eCos|ThreadX| FreeRTOS|linux|ChibiOS|embKernel See RTOS Support. Flash ----- http://openocd.sourceforge.net/doc/html/Flash-Commands.html#norconfiguration flash bank name driver base size chip_width bus_width target [driver_options] name ... may be used to reference the flash bank in other flash commands. A number is also available. driver ... identifies the controller driver associated with the flash bank being declared. This is usually cfi for external flash, or else the name of a microcontroller with embedded flash memory. See Flash Driver List. base ... Base address of the flash chip. size ... Size of the chip, in bytes. For some drivers, this value is detected from the hardware. chip_width ... Width of the flash chip, in bytes; ignored for most microcontroller drivers. bus_width ... Width of the data bus used to access the chip, in bytes; ignored for most microcontroller drivers. target ... Names the target used to issue commands to the flash controller. driver_options ... drivers may support, or require, additional parameters. See the driver-specific documentation for more information. flash write_image [erase] [unlock] filename [offset] [type] Memory Access ------------- http://openocd.sourceforge.net/doc/html/General-Commands.html#imageaccess {mdw,mdh,mdb} addr [count] dump {word, half-word, byte} data {mww,mwh,mwb} addr data write data