foo.c

   1 #include <stdio.h>
   2 #include "fakeasm.h"
   3 typedef unsigned char u8;
   4
   5 u8 data[] = {
   6         0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
   7         0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
   8 };
   9 u8 zero; //zero register
  10 u8 i0;
  11 u8 i1;
  12 u8 i2;
  13 u8 i3;
  14 u8 x;
  15 u8 t;
  16 u8 o;
  17 u8 _;
  18 #define Mh x //mod3 vars
  19 #define Ml t // -"-
  20 //http://homepage.divms.uiowa.edu/~jones/bcd/mod.shtml
  21 void mod3(void) {
  22         // mod3(Mh.Ml) -> t
  23         #define tmp _
  24         ADD     (Ml, Mh)
  25         CLR     (Mh)
  26         ADC     (Mh, zero, carry) //Mh only holds the carry bit
  27         MOV     (tmp, Ml)
  28         SWAP    (tmp)
  29         ANDI    (tmp, 0x0f)
  30         SWAP    (Mh)
  31         OR      (tmp, Mh)
  32         ANDI    (Ml, 0x0f)
  33         ADD     (Ml, tmp)
  34         MOV     (tmp, Ml)
  35         LSR     (tmp)
  36         LSR     (tmp)
  37         ANDI    (Ml, 0x03)
  38         ADD     (Ml, tmp)
  39         MOV     (tmp, Ml)
  40         LSR     (tmp)
  41         LSR     (tmp)
  42         ANDI    (Ml, 0x03)
  43         ADD     (Ml, tmp)
  44         CPI     (Ml, 3)
  45         BRPL    (skip)
  46         SUBI    (Ml, 3)
  47         skip:;
  48         RET
  49         #undef tmp
  50 }
  51 void g(void) {
  52         // g(i, t) -> t
  53         // tempvars: `x` and `_`
  54         #define tmp _
  55         ANDI    (t, 0x07)
  56         MOV     (tmp, i2)
  57         ANDI    (tmp, 3)
  58         TST     (tmp)
  59         #undef tmp
  60         BREQ    (skip)
  61         SUBI    (t, -8)
  62         skip:
  63         t = data[t];
  64         /*MOV X_hi==_, data_hi
  65           MOV X_lo==t, data_lo
  66           ADD X_lo, t
  67           ADC X_hi, zero
  68           LD  t, X         */
  69         t = (((i1&0x1f)<<8|i0)*t)>>8; //TODO
  70         RET //TODO: CALL/RET is expensive; store PC in register and RJMP, then JRMP back
  71 };
  72
  73 int main(void) {
  74         u8 n;
  75         u8 s;
  76         u8 acc;
  77         //TODO: clear all vars/registers
  78         for (;;) {
  79                 MOV     (n, i2)
  80                 LSL     (n)
  81                 LSL     (n)
  82                 #define tmp acc
  83                 MOV     (tmp, i1)
  84                 SWAP    (tmp)
  85                 ANDI    (tmp, 0x0f)
  86                 LSR     (tmp)
  87                 LSR     (tmp)
  88                 OR      (n, tmp)
  89                 #undef tmp
  90                 MOV     (s, i3)
  91                 ROR     (s)
  92                 ROR     (s)
  93                 ANDI    (s, 0x80)
  94                 #define tmp acc
  95                 MOV     (tmp, i2)
  96                 LSR     (tmp)
  97                 OR      (s, tmp)
  98                 #undef tmp
  99
 100                 //voice 1:
 101                 MOV     (t, n)
 102                 RCALL   g();
 103                 SWAP    (t)
 104                 ANDI    (t, 0x0f)
 105                 ANDI    (t, 1)
 106                 MOV     (acc, t)
 107
 108                 //voice 2:
 109                 #define tmp _
 110                 MOV     (tmp, i2)
 111                 LSL     (tmp)
 112                 LSL     (tmp)
 113                 LSL     (tmp)
 114                 MOV     (t, i1)
 115                 SWAP    (t)
 116                 ANDI    (t, 0xf)
 117                 LSR     (t)
 118                 OR      (t, tmp)
 119                 #undef tmp
 120                 EOR     (t, n)
 121                 RCALL   g();
 122                 LSR     (t)
 123                 LSR     (t)
 124                 ANDI    (t, 3)
 125                 AND     (t, s)
 126                 ADD     (acc, t)
 127
 128                 //voice 3:
 129                 MOV     (Ml, i2)
 130                 SWAP    (Ml)
 131                 ANDI    (Ml, 0xf0)
 132                 LSL     (Ml)
 133                 #define tmp Mh
 134                 MOV     (tmp, i1)
 135                 LSR     (tmp)
 136                 LSR     (tmp)
 137                 LSR     (tmp)
 138                 OR      (Ml, tmp)
 139                 #undef tmp
 140                 MOV     (Mh, i3)
 141                 SWAP    (Mh)
 142                 ANDI    (Mh, 0xf0)
 143                 LSL     (Mh)
 144                 #define tmp _
 145                 MOV     (tmp, i2)
 146                 LSR     (tmp)
 147                 LSR     (tmp)
 148                 LSR     (tmp)
 149                 OR      (Mh, tmp)
 150                 #undef tmp
 151                 RCALL   mod3();
 152                 ADD     (t, n)
 153                 RCALL   g();
 154                 LSR     (t)
 155                 LSR     (t)
 156                 ANDI    (t, 3)
 157                 MOV     (x, s)
 158                 INC     (x)
 159                 #define tmp _
 160                 MOV     (tmp, x)
 161                 LSR     (tmp)
 162                 LSR     (tmp)
 163                 ADD     (tmp, x)
 164                 ROR     (tmp)
 165                 LSR     (tmp)
 166                 ADD     (tmp, x)
 167                 ROR     (tmp)
 168                 LSR     (tmp)
 169                 ADD     (tmp, x)
 170                 ROR     (tmp)
 171                 LSR     (tmp)
 172                 MOV     (x, tmp)
 173                 #undef tmp
 174                 AND     (t, x)
 175                 ADD     (acc, t)
 176
 177                 //voice 4:
 178                 MOV     (Ml, i2)
 179                 SWAP    (Ml)
 180                 ANDI    (Ml, 0xf0)
 181                 LSL     (Ml)
 182                 LSL     (Ml)
 183                 #define tmp Mh
 184                 MOV     (tmp, i1)
 185                 LSR     (tmp)
 186                 LSR     (tmp)
 187                 OR      (Ml, tmp)
 188                 #undef tmp
 189                 MOV     (Mh, i3)
 190                 SWAP    (Mh)
 191                 ANDI    (Mh, 0xf0)
 192                 LSL     (Mh)
 193                 LSL     (Mh)
 194                 #define tmp _
 195                 MOV     (tmp, i2)
 196                 LSR     (tmp)
 197                 LSR     (tmp)
 198                 OR      (Mh, tmp)
 199                 #undef tmp
 200                 RCALL   mod3();
 201                 SUB     (t, n)
 202                 NEG     (t)
 203                 SUBI    (t, -8)
 204                 RCALL   g();
 205                 LSR     (t)
 206                 ANDI    (t, 3)
 207                 MOV     (x, s)
 208                 INC     (x)
 209                 #define tmp _
 210                 MOV     (tmp, x)
 211                 LSR     (tmp)
 212                 ADD     (tmp, x)
 213                 ROR     (tmp)
 214                 LSR     (tmp)
 215                 LSR     (tmp)
 216                 ADD     (tmp, x)
 217                 ROR     (tmp)
 218                 ADD     (tmp, x)
 219                 ROR     (tmp)
 220                 LSR     (tmp)
 221                 LSR     (tmp)
 222                 MOV     (x, tmp)
 223                 #undef tmp
 224                 AND     (t, x)
 225                 ADD     (acc, t)
 226
 227                 putchar(acc<<4); //TODO
 228                 SUBI    (i0, -1)
 229                 ADC     (i1, zero, !i0)
 230                 ADC     (i2, zero, !i0&&!i1)
 231                 ADC     (i3, zero, !i0&&!i1&&!i2)
 232         }
 233 }