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[Chiptunes.git] / foo.c
1 #include <stdio.h>
2 #include "fakeasm.h"
3 typedef unsigned char u8;
4
5 u8 data[] = {
6 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
7 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
8 };
9 u8 zero; //zero register
10 u8 i0;
11 u8 i1;
12 u8 i2;
13 u8 i3;
14 u8 x;
15 u8 t;
16 u8 o;
17 u8 _;
18 #define Mh o //mod3 vars
19 #define Ml t // -"-
20 void mod3(void) { //avail: t, o _
21 //http://homepage.divms.uiowa.edu/~jones/bcd/mod.shtml
22 #define tmp _
23 ADD (Ml, Mh)
24 CLR (Mh)
25 ADC (Mh, zero, carry) //Mh only holds the carry bit
26 MOV (tmp, Ml)
27 SWAP (tmp)
28 ANDI (tmp, 0x0f)
29 SWAP (Mh)
30 OR (tmp, Mh)
31 ANDI (Ml, 0x0f)
32 ADD (Ml, tmp) //discard tmp
33 MOV (tmp, Ml)
34 LSR (tmp)
35 LSR (tmp)
36 ANDI (Ml, 0x03)
37 Ml = (tmp) + (Ml);
38 Ml = (Ml >> 2) + (Ml & 0x3);
39 if (Ml > 2) Ml = Ml - 3;
40 #undef tmp
41 }
42 void g(void) {
43 // g(i, x, t, o) -> t
44 #define tmp _
45 ANDI (t, 0x07)
46 MOV (tmp, i2)
47 ANDI (tmp, 3)
48 TST (tmp)
49 #undef tmp
50 BREQ (skip)
51 SUBI (t, -8)
52 skip:
53 t = data[t];
54 /*MOV X_hi==_, data_hi
55 MOV X_lo==t, data_lo
56 ADD X_lo, t
57 ADC X_hi, zero
58 LD t, X */
59 t = (((i1&0x1f)<<8|i0)*t)>>8; //TODO
60 t >>= o; //NOTE: o == {1, 2, 4}
61 AND (t, x)
62 ANDI (t, 3)
63 RET
64 };
65
66 int main(void) {
67 u8 n;
68 u8 s;
69 u8 acc;
70 //TODO: clear all vars/registers
71 for (;;) {
72 MOV (n, i2)
73 LSL (n)
74 LSL (n)
75 #define tmp acc
76 MOV (tmp, i1)
77 SWAP (tmp)
78 ANDI (tmp, 0x0f)
79 LSR (tmp)
80 LSR (tmp)
81 OR (n, tmp)
82 #undef tmp
83 MOV (s, i3)
84 ROR (s)
85 ROR (s)
86 ANDI (s, 0x80)
87 #define tmp acc
88 MOV (tmp, i2)
89 LSR (tmp)
90 OR (s, tmp)
91 #undef tmp
92
93 //voice 1:
94 LDI (x, 1)
95 MOV (t, n)
96 LDI (o, 4)
97 RCALL g();
98 MOV (acc, t)
99
100 //voice 2:
101 MOV (x, s)
102 #define tmp o
103 MOV (tmp, i2)
104 LSL (tmp)
105 LSL (tmp)
106 LSL (tmp)
107 MOV (t, i1)
108 SWAP (t)
109 ANDI (t, 0xf)
110 LSR (t)
111 OR (t, tmp)
112 #undef tmp
113 EOR (t, n)
114 LDI (o, 2)
115 RCALL g();
116 ADD (acc, t)
117
118 //voice 3:
119 MOV (x, s)
120 INC (x)
121 #define tmp o
122 MOV (tmp, x)
123 LSR (tmp)
124 LSR (tmp)
125 ADD (tmp, x)
126 ROR (tmp)
127 LSR (tmp)
128 ADD (tmp, x)
129 ROR (tmp)
130 LSR (tmp)
131 ADD (tmp, x)
132 ROR (tmp)
133 LSR (tmp)
134 MOV (x, tmp)
135 #undef tmp
136 Ml = i2<<5 | i1>>3;
137 Mh = i3<<5 | i2>>3;
138 RCALL mod3();
139 ADD (t, n)
140 LDI (o, 2)
141 RCALL g();
142 ADD (acc, t)
143
144 //voice 4:
145 MOV (x, s)
146 INC (x)
147 #define tmp o
148 MOV (tmp, x)
149 LSR (tmp)
150 ADD (tmp, x)
151 ROR (tmp)
152 LSR (tmp)
153 LSR (tmp)
154 ADD (tmp, x)
155 ROR (tmp)
156 ADD (tmp, x)
157 ROR (tmp)
158 LSR (tmp)
159 LSR (tmp)
160 MOV (x, tmp)
161 #undef tmp
162 Ml = i2<<6 | i1>>2;
163 Mh = i3<<6 | i2>>2;
164 RCALL mod3();
165 SUB (t, n)
166 NEG (t)
167 SUBI (t, -8)
168 LDI (o, 1)
169 RCALL g();
170 ADD (acc, t)
171
172 putchar(acc<<4); //TODO
173 SUBI (i0, -1)
174 ADC (i1, zero, !i0)
175 ADC (i2, zero, !i0&&!i1)
176 ADC (i3, zero, !i0&&!i1&&!i2)
177 }
178 }
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