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[Chiptunes.git] / foo.c
1 #include <stdio.h>
2 #include "fakeasm.h"
3 typedef unsigned char u8;
4
5 u8 data[] = {
6 0x84, 0x9d, 0xb0, 0x69, 0x9d, 0x84, 0x69, 0x58,
7 0x75, 0x8c, 0xb0, 0x69, 0x8c, 0x75, 0x69, 0x58
8 };
9 u8 zero; //zero register
10 u8 i0;
11 u8 i1;
12 u8 i2;
13 u8 i3;
14 u8 x;
15 u8 t;
16 u8 o;
17 u8 _;
18 #define Mh o //mod3 vars
19 #define Ml t // -"-
20 //http://homepage.divms.uiowa.edu/~jones/bcd/mod.shtml
21 void mod3(void) {
22 // mod3(Mh.Ml) -> t
23 #define tmp _
24 ADD (Ml, Mh)
25 CLR (Mh)
26 ADC (Mh, zero, carry) //Mh only holds the carry bit
27 MOV (tmp, Ml)
28 SWAP (tmp)
29 ANDI (tmp, 0x0f)
30 SWAP (Mh)
31 OR (tmp, Mh)
32 ANDI (Ml, 0x0f)
33 ADD (Ml, tmp)
34 MOV (tmp, Ml)
35 LSR (tmp)
36 LSR (tmp)
37 ANDI (Ml, 0x03)
38 ADD (Ml, tmp)
39 MOV (tmp, Ml)
40 LSR (tmp)
41 LSR (tmp)
42 ANDI (Ml, 0x03)
43 ADD (Ml, tmp)
44 CPI (Ml, 3)
45 BRPL (skip)
46 SUBI (Ml, 3)
47 skip:;
48 RET
49 #undef tmp
50 }
51 void g(void) {
52 // g(i, t, o) -> t
53 // tempvars: `x` and `_`
54 #define tmp _
55 ANDI (t, 0x07)
56 MOV (tmp, i2)
57 ANDI (tmp, 3)
58 TST (tmp)
59 #undef tmp
60 BREQ (skip)
61 SUBI (t, -8)
62 skip:
63 t = data[t];
64 /*MOV X_hi==_, data_hi
65 MOV X_lo==t, data_lo
66 ADD X_lo, t
67 ADC X_hi, zero
68 LD t, X */
69 t = (((i1&0x1f)<<8|i0)*t)>>8; //TODO
70 t >>= o; //NOTE: o == {1, 2, 4}
71 ANDI (t, 3)
72 RET //TODO: CALL/RET is expensive; store PC in register and RJMP, then JRMP back
73 };
74
75 int main(void) {
76 u8 n;
77 u8 s;
78 u8 acc;
79 //TODO: clear all vars/registers
80 for (;;) {
81 MOV (n, i2)
82 LSL (n)
83 LSL (n)
84 #define tmp acc
85 MOV (tmp, i1)
86 SWAP (tmp)
87 ANDI (tmp, 0x0f)
88 LSR (tmp)
89 LSR (tmp)
90 OR (n, tmp)
91 #undef tmp
92 MOV (s, i3)
93 ROR (s)
94 ROR (s)
95 ANDI (s, 0x80)
96 #define tmp acc
97 MOV (tmp, i2)
98 LSR (tmp)
99 OR (s, tmp)
100 #undef tmp
101
102 //voice 1:
103 MOV (t, n)
104 LDI (o, 4)
105 RCALL g();
106 ANDI (t, 1)
107 MOV (acc, t)
108
109 //voice 2:
110 #define tmp o
111 MOV (tmp, i2)
112 LSL (tmp)
113 LSL (tmp)
114 LSL (tmp)
115 MOV (t, i1)
116 SWAP (t)
117 ANDI (t, 0xf)
118 LSR (t)
119 OR (t, tmp)
120 #undef tmp
121 EOR (t, n)
122 LDI (o, 2)
123 RCALL g();
124 AND (t, s)
125 ADD (acc, t)
126
127 //voice 3:
128 MOV (Ml, i2)
129 SWAP (Ml)
130 ANDI (Ml, 0xf0)
131 LSL (Ml)
132 #define tmp Mh
133 MOV (tmp, i1)
134 LSR (tmp)
135 LSR (tmp)
136 LSR (tmp)
137 OR (Ml, tmp)
138 #undef tmp
139 MOV (Mh, i3)
140 SWAP (Mh)
141 ANDI (Mh, 0xf0)
142 LSL (Mh)
143 #define tmp _
144 MOV (tmp, i2)
145 LSR (tmp)
146 LSR (tmp)
147 LSR (tmp)
148 OR (Mh, tmp)
149 #undef tmp
150 RCALL mod3();
151 ADD (t, n)
152 LDI (o, 2)
153 RCALL g();
154 MOV (x, s)
155 INC (x)
156 #define tmp o
157 MOV (tmp, x)
158 LSR (tmp)
159 LSR (tmp)
160 ADD (tmp, x)
161 ROR (tmp)
162 LSR (tmp)
163 ADD (tmp, x)
164 ROR (tmp)
165 LSR (tmp)
166 ADD (tmp, x)
167 ROR (tmp)
168 LSR (tmp)
169 MOV (x, tmp)
170 #undef tmp
171 AND (t, x)
172 ADD (acc, t)
173
174 //voice 4:
175 MOV (Ml, i2)
176 SWAP (Ml)
177 ANDI (Ml, 0xf0)
178 LSL (Ml)
179 LSL (Ml)
180 #define tmp Mh
181 MOV (tmp, i1)
182 LSR (tmp)
183 LSR (tmp)
184 OR (Ml, tmp)
185 #undef tmp
186 MOV (Mh, i3)
187 SWAP (Mh)
188 ANDI (Mh, 0xf0)
189 LSL (Mh)
190 LSL (Mh)
191 #define tmp _
192 MOV (tmp, i2)
193 LSR (tmp)
194 LSR (tmp)
195 OR (Mh, tmp)
196 #undef tmp
197 RCALL mod3();
198 SUB (t, n)
199 NEG (t)
200 SUBI (t, -8)
201 LDI (o, 1)
202 RCALL g();
203 MOV (x, s)
204 INC (x)
205 #define tmp o
206 MOV (tmp, x)
207 LSR (tmp)
208 ADD (tmp, x)
209 ROR (tmp)
210 LSR (tmp)
211 LSR (tmp)
212 ADD (tmp, x)
213 ROR (tmp)
214 ADD (tmp, x)
215 ROR (tmp)
216 LSR (tmp)
217 LSR (tmp)
218 MOV (x, tmp)
219 #undef tmp
220 AND (t, x)
221 ADD (acc, t)
222
223 putchar(acc<<4); //TODO
224 SUBI (i0, -1)
225 ADC (i1, zero, !i0)
226 ADC (i2, zero, !i0&&!i1)
227 ADC (i3, zero, !i0&&!i1&&!i2)
228 }
229 }
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